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參數(shù)資料
| 型號： | CY7B991V-7JCT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | Low Voltage Programmable Skew Clock Buffer |
| 中文描述： | 7B SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 8/14頁 |
| 文件大小： | 293K |
| 代理商： | CY7B991V-7JCT |
CY7B991V
3.3V RoboClock
Document Number: 38-07141 Rev. *C
Page 8 of 14
Figure 8
shows the CY7B991V connected in series to construct a zero skew clock distribution tree between boards. Delays of the
downstream clock buffers are programmed to compensate for the wire length (that is, select negative skew equal to the wire delay)
necessary to connect them to the master clock source, approximating a zero delay clock tree. Cascaded clock buffers accumulate
low frequency jitter because of the non-ideal filtering characteristics of the PLL filter. Do not connect more than two clock buffers in a
series.
Maximum Ratings
Operating outside these boundaries may affect the performance
and life of the device. These user guidelines are not tested.
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied ............................................ –55°C to +125°C
Supply Voltage to Ground Potential................–0.5V to +7.0V
DC Input Voltage ............................................–0.5V to +7.0V
Output Current into Outputs (LOW).............................64 mA
Static Discharge Voltage............................................>2001V
(MIL-STD-883, Method 3015)
Latch up Current......................................................>200 mA
Figure 8. Board-to-Board Clock Distribution
SYSTEM
CLOCK
Z
0
L1
L2
L3
L4
FB
REF
FS
4F0
4F1
3F0
3F1
2F0
2F1
1F0
1F1
TEST
4Q0
4Q1
3Q0
3Q1
2Q0
2Q1
1Q0
1Q1
REF
4F0
4F1
3F0
3F1
2F0
2F1
1F0
1F1
TEST
4Q0
4Q1
3Q0
3Q1
2Q0
2Q1
1Q0
1Q1
REF
FS
FB
LOAD
LOAD
LOAD
LOAD
LOAD
Z
0
Z
0
Z
0
Operating Range
Range
Commercial
Ambient Temperature
0°C to +70°C
V
CC
3.3V
±
10%
3.3V
±
10%
Industrial
–40°C to +85°C
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| CY7B991V-7JXCT | Low Voltage Programmable Skew Clock Buffer |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7B991V-7JXC | 功能描述:鎖相環(huán) - PLL 3.3V 80MHz 8 TTL COM Programable RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY7B991V-7JXCT | 功能描述:鎖相環(huán) - PLL 3.3V 80MHz 8 TTL COM Programable RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY7B992 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Programmable Skew Clock Buffer |
| CY7B992.2JC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Programmable Skew Clock Buffer |
| CY7B992.2JCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Programmable Skew Clock Buffer |
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