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參數(shù)資料
| 型號： | CY2DP3120 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 11/11頁 |
| 文件大?。?/td> | 92K |
| 代理商： | CY2DP3120 |
PRELIMINARY
FastEdge Series
CY2DP3120
Document #: 38-07514 Rev. *A
Page 11 of 11
Document History Page
Document Title: CY2DP3120 FastEdge Series 1:20 Differential Clock Buffer/Driver
Document Number: 38-07514
Orig. of
Change
**
122438
12/05/02
RGL
*A
125457
04/17/03
RGL
REV.
ECN NO.
Issue Date
Description of Change
New data sheet
Corrected typo Q14 to Q4 in pin 44 in the pin configuration diagram
Changed pin #s 1,14,27 and 40 from VCC to VCCO
Changed title to FastEdge Series 1:20 Differential Clock Buffer/Driver
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY2LL8422 | Clocks and Buffers |
| CY2LL843 | Clocks and Buffers |
| CY2LL842 | Clocks and Buffers |
| CY2PD817 | Clocks and Buffers |
| CY2PP3115 | Clocks and Buffers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2DP3120AI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:20 Differential Clock/Data Fanout Buffer |
| CY2DP3120AIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:20 Differential Clock/Data Fanout Buffer |
| CY2DP3120AXI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:20 Differential Clock/Data Fanout Buffer |
| CY2DP3120AXIT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:20 Differential Clock/Data Fanout Buffer |
| CY2DP314 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Differential Clock/Data Fanout Buffer |
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