參數(shù)資料
型號: CY2DP3120
英文描述: Clocks and Buffers
中文描述: 時鐘和緩沖器
文件頁數(shù): 10/11頁
文件大小: 92K
代理商: CY2DP3120
PRELIMINARY
FastEdge Series
CY2DP3120
Document #: 38-07514 Rev. *A
Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
Page 10 of 11
Package Diagram
FastEdge is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document
are the trademarks of their respective holders.
Ordering Information
Part Number
Package Type
Product Flow
CY2DP3120AI
CY2DP3120AIT
52-pin TQFP
52-pin TQFP – Tape and Reel
Industrial, –40
°
to 85
°
C
Industrial, –40
°
to 85
°
C
52-lead Thin Plastic Quad Flat Pack (10 × 10 × 1.4 mm) A52
51-85131-**
相關(guān)PDF資料
PDF描述
CY2LL8422 Clocks and Buffers
CY2LL843 Clocks and Buffers
CY2LL842 Clocks and Buffers
CY2PD817 Clocks and Buffers
CY2PP3115 Clocks and Buffers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY2DP3120AI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:20 Differential Clock/Data Fanout Buffer
CY2DP3120AIT 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:20 Differential Clock/Data Fanout Buffer
CY2DP3120AXI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:20 Differential Clock/Data Fanout Buffer
CY2DP3120AXIT 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:20 Differential Clock/Data Fanout Buffer
CY2DP314 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:1:4 Differential Clock/Data Fanout Buffer