參數(shù)資料
型號： CXK79M72C165GB
英文描述： MEMORY-SigmaRAM 16Meg 1x1z LVCMOS I/O (256K x 72) (27 pages 364K Rev. 7/6/01)
中文描述： 內存SigmaRAM 16Meg 1x1z的LVCMOS的I / O（256 × 72）（27頁364K牧師7/6/01）
文件頁數(shù)： 29/30頁
文件大?。?/td> 554K
代理商： CXK79M72C165GB
SONY
Σ
RAM CXK79M72C160GB / CXK79M36C160GB / CXK79M18C160GB
Preliminary
18Mb 1x1Lp, HSTL, rev 1.0
29 / 30
July 19, 2002
Revision History
Rev. #
Rev. Date
Description of Modifications
rev 0.0
02/23/01
Initial Version.
rev 0.1
07/06/01
1. Modified DC Electrical Characteristics section (p. 11).
Added I
DD-33
and I
DD-44
Average Power Supply Operating Current specifications.
2. Added 209 Pin BGA Package Dimensions (p. 26).
rev 0.2
02/22/02
1. Added BGA Package Thermal Characteristics (p. 10).
2. Modified AC Electrical Characteristics section (p. 13).
Removed “-44” bin. Added “-5” bin.
-4
t
CHCL
t
CLCH
3. Added JTAG ID Codes (p. 23).
4. Added JTAG Boundary Scan Register Bit Order Assignments (pp. 24-26).
t
KHKL
±
0.25 to t
KHKL
±
0.2
t
KLKH
±
0.25 to t
KLKH
±
0.2
rev 1.0
07/19/02
1. Modified Pin Assignment section (p. 2-4).
Byte Write Enable Control Inputs
Pin 1K
Pin 2K
Pin 10K
Pin 11K
Pin 6J
Pin 6L
Pin 6M
2. Modified I/O Capacitance section (p. 10).
C
KIN
3. Modified DC Recommended Operating Conditions section (p. 11).
Combined -1.8 and -1.5 line items into one for V
DDQ
, V
REF
, and V
CM
.
V
REF
(min), V
CM
(min)
V
REF
(max), V
CM
(max)
Removed notes 1 and 2.
4. Modified DC Electrical Characteristics section (p. 12).
Added MCH and MCL Input Leakage Current specifications.
Reduced x72 Average Power Supply Operating Currents by 100mA.
Reduced x36 Average Power Supply Operating Currents by 50mA.
Reduced x18 Average Power Supply Operating Currents by 20mA.
5. Modified AC Electrical Characteristics section (p. 13).
-33
t
KHCH
(max), t
KHCZ
-4
t
KHCH
(max), t
KHCZ
-5
t
KHCH
(max), t
KHCZ
6. Modified JTAG DC Recommended Operating Conditions section (p. 19).
V
TIH
(min)
V
TIL
(max)
I
TLI
(min)
7. Modified JTAG AC Electrical Characteristics section (p. 20).
t
THTH
t
THTL
, t
TLTH
Added t
CS
Capture Setup and t
CH
Capture Hold specifications.
8. Modified TAP Registers section (p. 22).
Instruction Register Codes 011, 110
BWx to Bx
CQ to CQ2
CQ to CQ2
CQ to CQ1
CQ to CQ1
M4 to MCL
M2 to MCH
M3 to MCH
3.5pF to 4.0pF
0.65V to V
DDQ
/2 - 0.1V
1.0V to V
DDQ
/2 + 0.1V
1.7ns to 1.8ns
2.0ns to 2.1ns
2.2ns to 2.3ns
1.2V to V
DD
/2 + 0.3V
0.6V to V
DD
/2 - 0.3V
-10uA to -20uA
20ns to 50ns
8ns to 20ns
Bypass to Private
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