參數(shù)資料
型號: CXD3531R
英文描述: Digital Signal Driver/Timing Generator
中文描述: 數(shù)字信號驅動器/時序發(fā)生器
文件頁數(shù): 23/30頁
文件大?。?/td> 360K
代理商: CXD3531R
– 23 –
CXD3531R
3-5. Software Flow
(1) Settings when power is turned on
The following procedure is the setting procedure first performed after power of the IC is turned on. If this
procedure is not executed, the internal VD will not be generated and register data cannot be set correctly.
Since the TG register uses a double register configuration using a V latch,
set the FORCE_VD register of the serial bus control register to "1" only at
startup to transfer TG register setting values.
Start
End
Perform setting for unset registers.
If TG is operating at this time, there is no need to write the FORCE_VD
register due to the fact that registers having a double register configuration
will be automatically written using VD from an external source.
Perform settings such as for the timing of the corresponding LCD panel
using the TG register.
(2) Setting procedure of the serial bus control register
The following procedure is the procedure for setting the serial bus control register in accordance with the external
EEPROM to which the IC is connected. Be sure to make settings according to the operating frequency of the IC
and the speed, capacity and number of external EEPROMs that are connected.
Find the optimum clock frequency for the external ROM I/F based on the
frequency of the system clock and set the Bits 1 and 0 of the RSCL_SEL
register to this value.
Start
End
Set the total capacity of the connected EEPROM devices and set Bits 5
and 4 of the ROM_MAP register to this value.
Set the slave addresses of the EEPROM devices connected into the
RSLV_ADDR register.
Set the area where write-back and refresh operations are performed to
Bits 1 and 0 of the REF_AREA register.
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相關代理商/技術參數(shù)
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