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參數(shù)資料
| 型號： | CXD3531R |
| 英文描述： | Digital Signal Driver/Timing Generator |
| 中文描述： | 數(shù)字信號驅(qū)動器/時序發(fā)生器 |
| 文件頁數(shù)： | 13/30頁 |
| 文件大?。?/td> | 360K |
| 代理商： | CXD3531R |
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CXD3531R
(m) GCFB pulse input pins (GCFBIN)
The GCFBIN (Pins 173, 174 and 175) input the LCD panel internal signal latch pulse.
Set these pins according to the register setting procedure during power-on and at set intervals.
(n) Test pins (TRST, TEST)
TRST (Pin 49) and TEST (Pins 50 and 51) are test pins. Leave these pins open, or connect them to GND.
2. Pipeline Delay of the RGB and OSD Signals
The pipeline delay for the I/O of the RGB signals is 46 clock cycles of the master clock. In addition, the pipeline
delay for the OSD, YS and YM signals is 39 clock cycles of the master clock.
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相關(guān)代理商/技術(shù)參數(shù) |
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| CXD3536R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Digital Signal Driver/Timing Generator |
| CXD3605R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Frame Readout CCD Image Sensor |
| CXD3606R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Frame Readout CCD Image Sensor |
| CXD3607R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Progressive Scan CCD Image Sensor |
| CXD3609R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator for Progressive Scan CCD Image Sensor |
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