參數(shù)資料
型號: CXD3531R
英文描述: Digital Signal Driver/Timing Generator
中文描述: 數(shù)字信號驅(qū)動器/時(shí)序發(fā)生器
文件頁數(shù): 15/30頁
文件大?。?/td> 360K
代理商: CXD3531R
– 15 –
CXD3531R
(4) Device address specification
After "Start" is sent, a 7-bit slave address and 1-bit read/write code is sent. Read/write operations with this IC
start if the input slave address matches the device address set using HSEL. If the device address does not
match, "Acknowledgment" is not generated and the system does nothing.
(5) Byte write operation
After "Start" is sent, the R/W code is set to low and an 8-bit device address word is input. The IC outputs
"Acknowledgment" on the 9th bit and enters write mode. After this, "Acknowledgment" is output every 8 bits
after each of the two 8-bit memory addresses are input. Next, "Acknowledgment" is output after 8 bits of write
data is input and written to the IC.
A
S
HSDA
1st memory address
(n)
2nd memory address
(n)
Write data (n)
Slave address
H
R
A
A
A
A
S
1
W
0
1
1
1
0
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
D
D
D
D
D
D
D
D
Byte Write Operation
HSDA in
HSDA out
1
2
8
9
"
Acknowledgment
"
"Start"
HSCL
Acknowledged
Not
acknowledged
(3) Acknowledgment (ACK)
Acknowledgment is used to indicate whether or not data has been sent/received normally. The
"Acknowledgment" of a data transfer is performed after that data transfer when the sender releases the bus on
the 9th clock of HSCL and the receiver drives low. If the host is the receiver, the IC is informed by the host that
data has ended by the fact that "Acknowledgment" is not generated for the last data sent from the IC.
Acknowledgment on the I
2
C Bus
If R/W = 1, read results, if R/W = 0, write results.
0
1
1
1
0
1
HSEL
R/W
Device Address Word (8 bits)
Device
Select
R/W
Code
Device Code (fixed)
Device Address Specification
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