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CXD3531R
Description of Operation
1. Description of Input Pins
(a) Initializing pins (PLLSTB, XCLR2 and XCLR3)
Internal PLL is initialized by setting PLLSTB (Pin 48) to 1 and internal circuit is initialized by setting XCLR2
(Pin 52) to 0. In addition, RGB output is initialized (preset) by setting XCLR3 (Pin 53) to 0.
Initialization should be performed when power is turned on. Be sure to perform power supply on according to
an initialization procedure.
(b) Sync signal input pins (HDIN and VDIN)
Horizontal and vertical separate sync signals are input to HDIN (Pin 66) and VDIN (Pin 67), respectively. The
CXD3531R supports only non-interlace sync signals with a dot clock of 100MHz or less.
(c) Master clock input pins (CLKC, CLKSEL and CLKPOL)
Phase comparison is performed by an external circuit and a clock synchronized to the sync signal is input. The
master clock input pin has CLKC (Pin 73) for CMOS level input.
CLKPOL: 0 = Input clock is non-inverted; 1 = Input clock is inverted
CLKSEL: 0 = PLL oscillation; 1 = PLL through
(d) PLL setting pin (PLLDIV)
PLLDIV (Pin 47) sets the divider setting of the internal phase compensation PLL circuit. The setting values for
master clock frequency are as follows.
PLLDIV: 0 = 55 to 100MHz; 1 = 25 to 50MHz
Note that the frequency of the clock input to the CXD3531R must be within the phase compensation PLL
operating range, even during free running.
(e) RGB signal input pins (RIN, GIN and BIN)
These pins input RGB digital signals in 12 bits. The Red signal is input to RIN (Pins 1 to 3, 5 to 7 and 10 to 15),
the Green signal to GIN (Pins 16 to 19 and 22 to 29), and the Blue signal to BIN (Pins 31, 32 and 35 to 44)
respectively.
RIN0, GIN0 and BIN0 are LSB, and RIN11, GIN11 and BIN11are MSB respectively.
(f) OSD signal input pins (ROSD, GOSD, BOSD, YS and YM)
These pins input OSD signals. The Red signal is input to ROSD (Pins 59 and 60), the Green signal to GOSD
(Pins 61 and 62), and the Blue signal to BOSD (Pins 64 and 65) respectively. In addition, the YM signal is input
to YM (Pin 55), and the YS signal to YS (Pin 56).