參數(shù)資料
型號: CXD3531R
英文描述: Digital Signal Driver/Timing Generator
中文描述: 數(shù)字信號驅動器/時序發(fā)生器
文件頁數(shù): 20/30頁
文件大小: 360K
代理商: CXD3531R
– 20 –
CXD3531R
[Example]
Address output when using eight 256K-bit EEPROMs (ROM_MAP = 01)
With this IC, the ROM slave address register setting [7:4] is set as is for the serial bus slave address [7:4], and
the memory address [17:15] is used for the slave address [3:1]. The memory address [14:0] is used as is for
the 1st and 2nd memory addresses. The 1st memory address [7] is fixed to all "0". Furthermore, up to eight
external EEPROMs can be connected to this IC.
BANK0
EEPROM
256K-bit
EEPROM
256K-bit
EEPROM
256K-bit
BANK1
X0h
RSDA
RSCL
X1h
X7h
BANK7
CXD3531R
BANK0
32K-byte
32K-byte
32K-byte
X0h
Slave address
X1h
X7h
0_0000h
0_7FFFh
0_8000h
0_FFFFh
1_0000h
3_7FFFh
3_8000h
3_FFFFh
BANK1
BANK7
Slave address register [7:1]
Slave address register [7:4]
Memory address [18:0]
1st memory address [7:0]
2nd memory address [7:0]
7
4
0
1
18
7
1
7
0
0
7
0
System Configuration Diagram
Memory Map
256K-byte space
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相關代理商/技術參數(shù)
參數(shù)描述
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