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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | CS8416-CNZ |
| 寤犲晢锛� | Cirrus Logic Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 2/37闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC RCVR DGTL 192KHZ 28QFN COMM |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 490 |
| 椤炲瀷锛� | 鏁�(sh霉)瀛楅煶闋绘帴鍙ｆ帴鏀跺櫒 |
| 鎳�(y墨ng)鐢細 | 鏁�(sh霉)瀛楅煶闋� |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 28-QFN |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 28-QFN 瑁搁湶鐒婄洡锛�5x5锛� |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 759 (CN2011-ZH PDF) |
| 閰嶇敤锛� | 598-1017-ND - BOARD EVAL FOR CS8416 RCVR |
| 鍏跺畠鍚嶇ū锛� | 598-1723 |
绗�1闋�鐣�(d膩ng)鍓嶇2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�
10
DS578F3
CS8416
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI MODE
(Inputs: Logic 0 = 0 V, Logic 1 = VL; CL = 20 pF)
Notes:
12. If Fs is lower than 46.875 kHz, the maximum CCLK frequency should be less than 128 Fs. This is dic-
tated by the timing requirements necessary to access the Channel Status memory. Access to the con-
trol register file can be carried out at the full 6 MHz rate. The minimum allowable input sample rate is
32 kHz, so choosing CCLK to be less than or equal to 4.1 MHz should be safe for all possible conditions.
13. Data must be held for sufficient time to bridge the transition time of CCLK.
14. For fsck <1 MHz.
Parameter
Symbol
Min
Max
Unit
CCLK Clock Frequency
fsck
06.0
MHz
CS High Time Between Transmissions
tcsh
1.0
-
s
CS Falling to CCLK Edge
tcss
20
-
ns
CCLK Low Time
tscl
66
-
ns
CCLK High Time
tsch
66
-
ns
CDIN to CCLK Rising Setup Time
tdsu
40
-
ns
CCLK Rising to DATA Hold Time
tdh
15
-
ns
CCLK Falling to CDOUT Stable
tpd
-50
ns
Rise Time of CDOUT
tr1
-25
ns
Fall Time of CDOUT
tf1
-25
ns
Rise Time of CCLK and CDIN
tr2
-100
ns
Fall Time of CCLK and CDIN
tr2
-100
ns
t r2
t f2
t dsu
t dh
t sch
t scl
CS
CCLK
CDIN
t css
t pd
CDOUT
t csh
Figure 3. SPI Mode Timing
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| CS8416-CNZ | 鍒堕€犲晢:Cirrus Logic 鍔熻兘鎻忚堪:Receiver IC RoHS Compliant:Yes |
| CS8416-CNZR | 鍔熻兘鎻忚堪:闊抽牷鐧�(f膩)閫佸櫒銆佹帴鏀跺櫒銆佹敹鐧�(f膩)鍣� IC 192 kHz Digital Audio Receiver RoHS:鍚� 鍒堕€犲晢:Cirrus Logic 宸ヤ綔闆绘簮闆诲:3.3 V, 5 V 闆绘簮闆绘祦:11.8 mA 閫氶亾鏁�(sh霉)閲�:1 鏈€澶у伐浣滄韩搴�:+ 70 C 鎺ュ彛椤炲瀷:I2C, SPI 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:TSSOP-28 灏佽: |
| CS8416-CS | 鍒堕€犲晢:CIRRUS 鍒堕€犲晢鍏ㄧū:Cirrus Logic 鍔熻兘鎻忚堪:192 kHZ DIGITAL AUDIO INTERFACE RECEIVER |
| CS8416-CSR | 鍒堕€犲晢:Cirrus Logic 鍔熻兘鎻忚堪:- Tape and Reel |
| CS8416CSZ | 鍒堕€犲晢:Cirrus Logic 鍔熻兘鎻忚堪: |
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