參數(shù)資料
型號： CS53L21-CNZR
廠商： Cirrus Logic Inc
文件頁數(shù)： 14/26頁
文件大?。?/td> 0K
描述： IC ADC STEREO 24BIT 98DB 32-QFN
標(biāo)準(zhǔn)包裝： 6,000
位數(shù)： 24
采樣率（每秒）： 100k
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
功率耗散（最大）： 30mW
電壓電源： 模擬和數(shù)字
工作溫度： -10°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 32-QFN
供應(yīng)商設(shè)備封裝： 32-QFN（5x5）
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 3 個單端，單極
配用： 598-1550-ND - BOARD EVAL FOR CS53L21 ADC
BU2280FV, BU2360FV, BU2362FV
Technical Note
21/23
www.rohm.com
2012.02 - Rev.B
2012 ROHM Co., Ltd. All rights reserved.
●Example of application circuit
◎BU2362FV
Description of terminal
Pin No.
PIN NAME
Function
1
VDD2
Power supply for CLK27, CLK36M
2
VSS2
GND for CLK27, CLK36M
3
CLK27M
27MHz Clock output terminal
4
TEST
Input pin for TEST : with pull-down
(Please set ”L” or OPEN, normally)
5
AVDD
Power supply for Analog block
6
AVSS
GND for Analog block
7
XTALOUT
Crystal output terminal
8
XTALIN
Crystal input terminal
9
CLKA
CLKA output terminal (16.9344MHz or 36.8640MHz)
10
CLK512FS
512fs Clock output terminal (22.5792MHz or 24.5760MHz)
11
DVSS
Power supply for Digital block
12
DVDD
GND for Digital block
13
CLK16M
16.9344MHz Clock output terminal
14
FSEL1
CLKA or CLK512FS pin output select : with pull-up
15
CLK33M
33.8688MHz Clock output terminal
16
CLK36M
36.8640MHz Clock output terminal
●Notes for use (BU2362FV)
Basically, mount ICs to the printed circuit board for use. (If the ICs are not mounted to the printed circuit board, the
characteristics of ICs may not be fully demonstrated.)
Mount 0.1
F capacitors in the vicinity of the IC PINs between 1PIN (VDD2) and 2PIN (VSS2), 5PIN (AVDD) and 6PIN
(AVSS), 11PIN (DVSS) and 12PIN (DVDD), respectively.
For the fine-tuning of frequencies, insert several numbers of pF in the 7PIN and 8PIN to GND.
Depending on the conditions of the printed circuit board, mount an additional electrolytic capacitor between the power supply
and GND terminal.
For EMI protection, it is effective to put ferrite beads in the origin of power supply to be fed to BU2362FV from the printed
circuit board or to insert a capacitor (of 1
or less), which bypasses high frequency desired, between the power supply and
the GND terminal.
*Even though we believe that the example of recommended circuit is worth of a recommendation, please be sure to thoroughly recheck the characteristics
before use.
Fig.126
1:VDD2
16:CLK36M
2:VSS2
15:CLK33M
36.8640MHz
27.0000MHz
3:CLK27M
14:FSEL1
33.8688MHz
4:TEST
13:CLK16M
H:44.1kHz mode
L:48kHz mode
5:AVDD
12:DVDD
6:AVSS
11:DVSS
7:XTALOUT
10:CLK512FS1
22.5792MHz
or 24.5670MHz
8:XTALIN
9:CLKA
16.9344MHz
or 36.8640MHz
BU2362FV
27.0000MHz
16.9344MHz
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