參數(shù)資料
型號: CS4351-DZZ
廠商: Cirrus Logic Inc
文件頁數(shù): 20/37頁
文件大?。?/td> 0K
描述: IC DAC STER 112DB 192KHZ 20TSSOP
標準包裝: 74
位數(shù): 24
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 354mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 托盤
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): 192k
配用: 598-1152-ND - BOARD EVAL FOR CS4351 DAC
DS566F1
27
CS4351
6.4
Mute Control - Register 04h
6.4.1
Auto-Mute (AMUTE) Bit 7
Function:
When set to 1 (default), the Digital-to-Analog converter output will mute following the reception of 8192
consecutive audio samples of static 0 or -1. A single sample of non-static data will release the mute. De-
tection and muting is done independently for each channel. The quiescent voltage on the output will be
retained and the Mute Control pin will go active during the mute period. When set to 0, this function is
disabled
6.4.2
AMUTEC = BMUTEC (MUTEC A=B) Bit 5
Function:
When set to 0 (default), the AMUTEC and BMUTEC pins operate independently.
When set to 1, the individual controls for AMUTEC and BMUTEC are internally connected through an
AND gate prior to the output pins. Therefore, the external AMUTEC and BMUTEC pins will go active only
when the requirements for both AMUTEC and BMUTEC are valid.
6.4.3
A Channel Mute (MUTE_A) Bit 4
B Channel Mute (MUTE_B) Bit 3
Function:
When set to 1, the Digital-to-Analog converter output will mute. The quiescent voltage on the output will
be retained. The muting function is effected, similar to attenuation changes, by the Soft and Zero Cross
bits in the Volume and Mixing Control register. The corresponding MUTEC pin will go active following any
ramping due to the soft and zero cross function.
When set to 0 (default), this function is disabled.
6.5
Channel A Volume Control - Register 05h
Channel B Volume Control - Register 06h
7
6
5
432
10
AMUTE
Reserved
MUTEC A=B
MUTE_A
MUTE_B
Reserved
1
0
000
00
7
6
5
432
10
VOL7
VOL6
VOL5
VOL4
VOL3
VOL2
VOL1
VOL0
0
000
00
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