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參數(shù)資料
| 型號： | COP8SBR9KMT8 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout |
| 中文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO56 |
| 封裝： | TSSOP-56 |
| 文件頁數(shù)： | 27/80頁 |
| 文件大?。?/td> | 972K |
| 代理商： | COP8SBR9KMT8 |
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11.0 In-System Programming
11.1 INTRODUCTION
This device provides the capability to program the program
memory while installed in an application board. This feature
is called In System Programming (ISP). It provides a means
of ISP by using the MICROWIRE/PLUS, or the user can
provide his own, customized ISP routine. The factory in-
stalled ISP uses the MICROWIRE/PLUS port. The user can
provide his own ISP routine that uses any of the capabilities
of the device, such as USART, parallel port, etc.
11.2 FUNCTIONAL DESCRIPTION
The organization of the ISP feature consists of the user flash
program memory, the factory boot ROM, and some registers
dedicated to performing the ISP function. See
Figure 13
for
a simplified block diagram. The factory installed ISP that
uses MICROWIRE/PLUS is located in the Boot ROM. The
size of the Boot ROM is 1K bytes and also contains code to
facilitate in system emulation capability. If a user chooses to
write his own ISP routine, it must be located in the flash
program memory.
As described in
10.5 OPTION REGISTER
, there is a bit,
FLEX, that controls whether the device exits RESET execut-
ing from the flash memory or the Boot ROM. The user must
program the FLEX bit as appropriate for the application. In
the erased state, the FLEX bit = 0 and the device will
power-up executing from Boot ROM. When FLEX = 0, this
assumes that either the MICROWIRE/PLUS ISP routine or
external programming is being used to program the device. If
using the MICROWIRE/PLUS ISP routine, the software in
the boot ROM will monitor the MICROWIRE/PLUS for com-
mands to program the flash memory. When programming
the flash program memory is complete, the FLEX bit will
have to be programmed to a 1 and the device will have to be
reset, either by pulling external Reset to ground or by a
MICROWIRE/PLUS ISP EXIT command, before execution
from flash program memory will occur.
If FLEX = 1, upon exiting Reset, the device will begin ex-
ecuting from location 0000 in the flash program memory. The
assumption, here, is that either the application is not using
ISP, is using MICROWIRE/PLUS ISP by jumping to it within
the application code, or is using a customized ISP routine. If
a customized ISP routine is being used, then it must be
programmed into the flash memory by means of the
MICROWIRE/PLUS ISP or external programming as de-
scribed in the preceding paragraph.
11.3 REGISTERS
There are six registers required to support ISP: Address
Register Hi byte (ISPADHI), Address Register Low byte
(ISPADLO), Read Data Register (ISPRD), Write Data Reg-
ister (ISPWR), Write Timing Register (PGMTIM), and the
Control Register (ISPCNTRL). The ISPCNTRL Register is
not available to the user.
11.3.1 ISP Address Registers
The address registers (ISPADHI & ISPADLO) are used to
specify the address of the byte of data being written or read.
For page erase operations, the address of the beginning of
the page should be loaded. For mass erase operations,
0000 must be placed into the address registers. When read-
ing the Option register, FFFF (hex) should be placed into the
address registers. Registers ISPADHI and ISPADLO are
cleared to 00 on Reset. These registers can be loaded from
either flash program memory or Boot ROM and must be
maintained for the entire duration of the operation.
Note: The actual memory address of the Option Register is
7FFF (hex), however the MICROWIRE/PLUS ISP routines
require the address FFFF (hex) to be used to read the
Option Register when the Flash Memory is secured.
TABLE 4. High Byte of ISP Address
ISPADHI
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Addr15
Addr14
Addr 13
Addr12
Addr11
Addr10
Addr9
Addr8
TABLE 5. Low Byte of ISP Address
ISPADLO
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Addr7
Addr6
Addr5
Addr4
Addr3
Addr2
Addr1
Addr0
10138917
FIGURE 13. Block Diagram of ISP
C
www.national.com
27
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| COP8SBR9LVA8 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| COP8SBR9LVA8/NOPB | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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| COP8SCE9 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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