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參數(shù)資料
| 型號： | COP688CL |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-Bit Microcontroller(8位微控制器) |
| 中文描述： | 8位微控制器（8位微控制器） |
| 文件頁數(shù)： | 7/41頁 |
| 文件大?。?/td> | 565K |
| 代理商： | COP688CL |
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DC Electrical Characteristics
(Continued)
COP98XCL: 0C
≤
T
A
≤
+ 70C unless otherwise specified.
Parameter
Maximum Input Current
without Latchup (Note 6)
RAM Retention Voltage, V
r
Conditions
Min
Typ
Max
±
100
Units
mA
T
A
= 25C
500 ns Rise
and Fall Time (Min)
2
V
Input Capacitance
Load Capacitance on D2
7
pF
pF
1000
Note 3:
Rate of voltage change must be less then 0.5 V/ms.
Note 4:
Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 5:
The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to V
CC
, L and G0–G5 configured as
outputs and set high. The D port set to zero. The clock monitor is disabled.
AC Electrical Characteristics
0C
≤
T
A
≤
+ 70C unless otherwise specified.
Parameter
Instruction Cycle Time (t
c
)
Crystal or Resonator
Conditions
Min
Typ
Max
Units
4V
≤
V
CC
≤
6V
2.5V
≤
V
CC
<
4V
4V
≤
V
CC
≤
6V
2.5V
≤
V
CC
<
4V
1
DC
DC
DC
DC
μs
μs
μs
μs
2.5
3
7.5
R/C Oscillator
Inputs
t
SETUP
4V
≤
V
CC
≤
6V
2.5V
≤
V
CC
<
4V
4V
≤
V
CC
≤
6V
2.5V
≤
V
CC
<
4V
R
L
= 2.2k, C
L
= 100 pF
200
500
60
150
ns
ns
ns
ns
t
HOLD
Output Propagation Delay (Note 7)
t
PD1
, t
PD0
SO, SK
4V
≤
V
CC
≤
6V
2.5V
≤
V
CC
<
4V
4V
≤
V
CC
≤
6V
2.5V
≤
V
CC
<
4V
0.7
1.75
1
2.5
μs
μs
μs
μs
ns
ns
ns
All Others
MICROWIRE
Setup Time (t
UWS
)
MICROWIRE Hold Time (t
UWH
)
MICROWIRE Output Propagation Delay (t
UPD
)
Input Pulse Width
Interrupt Input High Time
Interrupt Input Low Time
Timer Input High Time
Timer Input Low Time
Reset Pulse Width
20
56
220
1
1
1
1
1
t
c
t
c
t
c
t
c
μs
Note 6:
Pins G6 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than V
CC
and the pins will
have sink current to V
CC
when biased at voltages greater than V
CC
(the pins do not have source current when biased at a voltage below V
CC
). The effective resistance
to V
CC
is 750
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
Note 7:
The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
C
www.national.com
7
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相關代理商/技術參數(shù) |
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|---|---|
| COP688CL-XXX/N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:General Description |
| COP688CL-XXX/V | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:General Description |
| COP688CS | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based Microcontrollers with 4k to 24k Memory, Comparators and USART |
| COP688CS-XXX/V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|8-BIT|COP800 CPU|CMOS|LDCC|44PIN|PLASTIC |
| COP688EB | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART |
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