參數(shù)資料
型號(hào)： COP688CL
廠商： National Semiconductor Corporation
元件分類： 8位微控制器
英文描述： 8-Bit Microcontroller(8位微控制器)
中文描述： 8位微控制器（8位微控制器）
文件頁(yè)數(shù)： 13/41頁(yè)
文件大?。?/td> 565K
代理商： COP688CL
Typical Performance Characteristics
40C
≤
T
A
≤
+85C unless otherwise specified (Continued)
Pin Descriptions
V
CC
and GND are the power supply pins.
CKI is the clock input. This can come from an R/C generated
oscillator, or a crystal oscillator (in conjunction with CKO).
See Oscillator Description section.
RESET is the master reset input. See Reset Description
section.
The device contains three bidirectional 8-bit I/O ports (C, G
and L), where each individual bit may be independently
configured as an input (Schmitt trigger inputs on ports G and
L), output or TRI-STATE under program control. Three data
memory address locations are allocated for each of these
I/O ports. Each I/O port has two associated 8-bit memory
mapped registers, the CONFIGURATION register and the
output DATA register. A memory mapped address is also
reserved for the input pins of each I/O port. (See the memory
map for the various addresses associated with the I/O ports.)
Figure 4 shows the I/O port configurations. The DATA and
CONFIGURATION registers allow for each port bit to be
individually configured under software control as shown be-
low:
CONFIGURA-
TION
Register
0
DATA
Register
Port Set-Up
0
Hi-Z Input
(TRI-STATE Output)
Input with Weak Pull-Up
Push-Pull Zero Output
Push-Pull One Output
0
1
1
1
0
1
Port L/C/G Push-Pull Source Current
DS009766-31
Port L/C/G Push-Pull Sink Current
DS009766-32
Port D Source Current
DS009766-33
Port D Sink Current
DS009766-34
DS009766-6
FIGURE 4. I/O Port Configurations
C
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