參數(shù)資料
型號: COP688CL
廠商: National Semiconductor Corporation
元件分類: 8位微控制器
英文描述: 8-Bit Microcontroller(8位微控制器)
中文描述: 8位微控制器(8位微控制器)
文件頁數(shù): 11/41頁
文件大?。?/td> 565K
代理商: COP688CL
DC Electrical Characteristics
55C
T
A
+25C unless otherwise specified
Parameter
Allowable Sink/Source
Current per Pin
D Outputs (Sink)
All others
Maximum Input Current
without Latchup (Note 21)
RAM Retention Voltage, V
r
Conditions
Min
Typ
Max
Units
12
2.5
150
mA
mA
mA
500 ns Rise
and Fall Time (Min)
2.0
V
Input Capacitance
Load Capacitance on D2
7
pF
pF
1000
Note 18:
Rate of voltage change must be less then 0.5 V/ms.
Note 19:
Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 20:
The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Test conditions: All inputs tied to V
CC
, L and G ports in the
TRI-STATE mode and tied to ground, all outputs low and tied to ground. The Clock Monitor and the comparators are disabled.
AC Specifications for COP688CL
AC Electrical Characteristics
55C
T
A
+125C unless otherwise specified
Parameter
Instruction Cycle Time (t
c
)
Crystal, Resonator, or
External Oscillator
R/C Oscillator (div-by 10)
Inputs
t
SETUP
t
HOLD
Output Propagation Delay (Note 22)
t
PD1
, t
PD0
SO, SK
All Others
MICROWIRE Setup Time (t
UWS
)
MICROWIRE Hold Time(t
UWH
)
MICROWIRE Output Propagation Delay (t
UPD
)
Input Pulse Width
Interrupt Input High Time
Interrupt Input Low Time
Timer Input High Time
Timer Input Low Time
Reset Pulse Width
Conditions
Min
Typ
Max
Units
V
CC
4.5V
1
DC
μs
V
CC
4.5V
3
DC
μs
V
CC
4.5V
V
CC
4.5V
R
L
= 2.2k, C
L
= 100 pF
200
60
ns
ns
V
CC
4.5V
V
CC
4.5V
0.7
1
μs
μs
ns
ns
ns
20
56
220
1
1
1
1
1
t
c
t
c
t
c
t
c
μs
Note 21:
Pins G6 and RESET are designed with a high voltage input network for factory testing. These pins allow input voltages greater than V
CC
and the pins will
have sink current to V
CC
when biased at voltages greater than V
CC
(the pins do not have source current when biased at a voltage below V
CC
). The effective resistance
to V
CC
is 750
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V.
Note 22:
The output propagation delay is referenced to the end of the instruction cycle where the output change occurs.
C
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