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參數(shù)資料
| 型號(hào)： | CL-PS6700-VC-A |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 總線控制器 |
| 英文描述： | Low-Power PC Card Controller for the CL-PS7111 |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP100 |
| 封裝： | PLASTIC, VQFP-100 |
| 文件頁數(shù)： | 29/48頁 |
| 文件大?。?/td> | 562K |
| 代理商： | CL-PS6700-VC-A |
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November 1997
29
PRELIMINARY DATA BOOK v1.0
REGISTERS
C
I R R U S
L
O G I C
C
O N F I D E N T I A L
, N D A R
E Q U I R E D
CL-PS6700
Low-Power PC Card Controller
4.5.2
Card Interface Timing Register 0A
(0X0C003000
)
4.5.3
Card Interface Timing Register 0B
(0X0C003400
)
Bit(s)
Description
Default R/W
15:14
Prescaler Field for Watchdog Timer.
00 – Divide by 1
01 – Divide by 16
10 – Divide by 256
11 – Divide by 8192
00
R/W
13:8
Count Field for Watchdog Timer.
Settings of 00 to 3Fh correspond to values between 1 and
64 times the prescale value. The period starts at the end of the command width period and
continues as long as PCM_WAIT_L is low. If terminal count is reached, an interrupt can be
generated.
1Fh
R/W
7:6
Prescaler
Field for Command Strobe Width.
00 – Divide by 1
01 – Divide by 16
10 – Divide by 256
11 – Divide by 8192
00
R/W
5:0
Count Field for Command Strobe Width.
This field has values between 1 and 64. The com-
mand width equals:
t
CMD
= t
PCLK
×
([Prescale
×
Count] + 2)
00h
R/W
Bit(s)
Description
Default R/W
15:14
Prescaler
Field for Address and Data Hold Time.
00 – Divide by 1
01 – Divide by 16
10 – Divide by 256
11 – Divide by 8192
00
R/W
13:8
Count Field for Hold Period.
Settings of 00 to 3Fh correspond to 1 to 64 times the prescale
value. The period starts at the end of the command strobe. The hold time equals:
t
Hold
= t
PCLK
×
([Prescale
×
Count] + 1) + constant
00h
R/W
7:6
Prescaler Field for Address and Data Setup Time.
00 – Divide by 1
01 – Divide by 16
10 – Divide by 256
11 – Divide by 8192
0
R/W
5:0
Count Field for Address and Data Setup Time.
Settings of 00 to 3Fh correspond to 1 to 64
times the prescale value. The period starts at valid address and ends when the command
strobe is active. The setup time equals:
t
setup
= t
PCLK
×
([Prescale
×
Count] + 1)
constant
0
R/W
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CL-PS7110-VC-A | Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | Low-Power System-on-a-Chip |
| CL-PS7110 | Low-Power System-on-a-Chip |
| CL-PS7111 | Low-Power System-on-a-Chip |
| CL-PS7111-VC-A | Low-Power System-on-a-Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CL-PS7110 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7110-VC-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7110-VI-A | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7111 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:Low-Power System-on-a-Chip |
| CL-PS7111(208LQFP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
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