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參數(shù)資料
| 型號： | CDP1020 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | SMBus/I2C ACPI Dual Device Bay Controller |
| 中文描述： | I2C BUS CONTROLLER, PDSO28 |
| 封裝： | PLASTIC, MS-013AE, SOIC-28 |
| 文件頁數(shù)： | 23/23頁 |
| 文件大?。?/td> | 154K |
| 代理商： | CDP1020 |
2-440
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
Solenoid Drivers
For control of the device bay software controlled solenoids,
the SFTLOCK pins have drive capability to gate an external,
solenoid control MOSFET. Typical circuit configuration is
shown in Figure 18. Note that since the output voltage is not
charge-pumped, only the V
DD
voltage (3.3V to 5V) is
available to drive a FET input gate; therefore, a logic level
FET such as the Intersil HUF76113DK8 is recommended.
V
GATE
V
DD
+12V
+3.3V (AUX)
1394PR0
USBPR0
PWREN0
HUF76113DK8 (1/2)
V
ID
D
B
A8
A10
A13
REMOVE REQUEST
(N.O.)
REMREQ0
+12V
BAY LOCK
SOLENOID
SFTLOCK0
BAY SECURITY
LOCK/SWITCH
SECURE0
LEDG0
LEDA0
BAY STATUS LED
2 COLOR,
COMMON CATHODE
180
V
SS
25
PIIX4 SOUTH BRIDGE
SDA
SCK
ALRT
S
S
S
+3.3V (AUX)
RESET
CLK
C
SYSTEM RESET
AD0
AD1
11
12
13
14
15
3
4
5
28
6
27
1
24
26
17
19
20
R
T
N
M
CDP1020
FIGURE 18. TYPICAL CDP1020 SYSTEM HARDWARE CONNECTIONS - PiiX4 BASED INTEL ARCHITECTURE PLATFORM (ONLY BAY
0 SHOWN)
V
LED
23
+5V (MAIN)
+3.3V (AUX)
3.3k
100PF
TEST
2
+3.3V
C
CDP1020
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相關(guān)代理商/技術(shù)參數(shù) |
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