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參數(shù)資料
| 型號： | CDP1020 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | SMBus/I2C ACPI Dual Device Bay Controller |
| 中文描述： | I2C BUS CONTROLLER, PDSO28 |
| 封裝： | PLASTIC, MS-013AE, SOIC-28 |
| 文件頁數(shù)： | 22/23頁 |
| 文件大?。?/td> | 154K |
| 代理商： | CDP1020 |
2-439
The result is a +12V signal that can be used to directly drive
the gate of a N-Channel MOSFET used to control the V
ID
to
the bay. For best operation, a Intersil HUF76113DK8 Dual
N-Channel Logic Level Power MOSFET is recommended for
V
ID
switching.
The CDP1020 controls the turn on time of the V
ID
MOSFET
by limiting the amount of current that can be drawn from the
PWREN outputs. The constant current source capabilities of
the PWREN pins is typically 25
μ
A. For designs that require
slower turn-on times, external capacitors can be added in
parallel with the gate of the V
ID
MOSFET. Figure 15 below
shows the rise time of the PWREN outputs into the gate of a
Intersil HUF76113DK8 MOSFET.
LED Drive Pins
As discussed in the
State Machine Logic
and
User
Interface
texts, the CDP1020 has the capability to directly
drive two dual color bay status LED indicators. Each bay
controlled by the CDP1020 has a green (LEDGx) and amber
(LEDAx) drive pin. These pins are capable of sourcing or
sinking 6mA at 3.3V and 15mA at 5.0V. Since their drive
capability is symmetric, the LED drive pins can control three
terminal common anode LEDs, three terminal common
cathode LEDs, or two terminal two color LEDs. Note that
external limiting resistors are required. Typical circuit
connections are shown in Figures 16A and 16B.
As mentioned at the beginning of this document, the high
side of the LED drive pins is switched directly to the V
LED
power input. Thus, all current used by the bay status LEDs is
drawn from the V
LED
power input rather that V
DD
. This
method is similar to that used on the PWREN outputs,
except that there is no current limiting and the V
LED
input
cannot rise above 5.0V. A block diagram of one of the LED
drive pins (all four drive pins are identical) is shown in Figure
17. The purpose of V
LED
is to allow system architects to
drive the bay status LEDs from a separate supply than that
which is powering the CDP1020. For those systems that do
not wish to drive the LED outputs from a separate supply,
simply tie V
DD
and V
LED
together. V
LED
may be greater
than, less than or equal to the V
DD
input of the CDP1020.
FIGURE 15. PWREN OUTPUT INTO GATE OF HUF76113DK8
V
GATE
= 12.0V (TYPICAL, 25
o
C)
FIGURE 14. POWER ENABLE OUTPUT CIRCUITRY
PWR_CTL (0-V
DD
)
V
GATE
LEVEL
SHIFTER
V
GATE
25
μ
A CURRENT
LIMITER
PWR_CTL (0-V
GATE
)
PWREN
OUTPUT
0
V
P
,
V
DD
= 3.3V
V
DD
= 5.0V
0
2
4
6
8
10
12
T
RPWREN
, PWREN RISE TIME (
μ
s)
0.5
1.0
2.0
1.5
FIGURE 16A. LED DRIVER CONNECTIONS TO A 3-TERMINAL
AMBER/GREEN LED
FIGURE 16B. LED DRIVER CONNECTIONS TO 2-TERMINAL
AMBER/GREEN LED
180
19
20
LEDA0
LEDG0
A
G
180
20
19
LEDG0
LEDA0
A
G
LEDX (0-V
DD
)
V
LED
LEVEL
SHIFTER
V
LED
LEDX (0-V
LED
)
LEDG/A
OUTPUT
FIGURE 17. LED DRIVER OUTPUT CIRCUITRY
CDP1020
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1020M | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| CDP1802A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 8-Bit Microprocessors |
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