參數(shù)資料
型號： C8051F300DK
廠商： Silicon Laboratories Inc
文件頁數(shù)： 140/178頁
文件大小： 0K
描述： DEV KIT F300/301/302/303/304/305
標準包裝： 1
類型： MCU
適用于相關產品： Silicon Laboratories C8051 F300/001/002
所含物品： 評估板，電源，USB 線纜，適配器和文檔
產品目錄頁面： 626 (CN2011-ZH PDF)
相關產品： 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
C8051F002-GQR-ND - IC 8051 MCU 32K FLASH 32LQFP
C8051F001-GQR-ND - IC 8051 MCU 32K FLASH 48TQFP
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
336-1186-ND - IC 8051 MCU 32K FLASH 32LQFP
336-1185-ND - IC 8051 MCU 32K FLASH 48TQFP
其它名稱： 336-1246
C8051F300/1/2/3/4/5
64
Rev. 2.9
8.2.2. Data Memory
The CIP-51 includes 256 bytes of internal RAM mapped into the data memory space from 0x00 through
0xFF. The lower 128 bytes of data memory are used for general purpose registers and scratch pad mem-
ory. Either direct or indirect addressing may be used to access the lower 128 bytes of data memory. Loca-
tions 0x00 through 0x1F are addressable as four banks of general purpose registers, each bank consisting
of eight byte-wide registers. The next 16 bytes, locations 0x20 through 0x2F, may either be addressed as
bytes or as 128 bit locations accessible with the direct addressing mode.
The upper 128 bytes of data memory are accessible only by indirect addressing. This region occupies the
same address space as the Special Function Registers (SFR) but is physically separate from the SFR
space. The addressing mode used by an instruction when accessing locations above 0x7F determines
whether the CPU accesses the upper 128 bytes of data memory space or the SFRs. Instructions that use
direct addressing will access the SFR space. Instructions using indirect addressing above 0x7F access the
upper 128 bytes of data memory. Figure 8.3 illustrates the data memory organization of the CIP-51.
(Direct and Indirect
Addressing)
0x00
0x7F
Upper 128 RAM
(Indirect Addressing
Only)
0x80
0xFF
Special Function
Register's
(Direct Addressing Only)
General Purpose
Registers
0x1F
0x20
0x2F
Bit Addressable
Lower 128 RAM
(Direct and Indirect
Addressing)
0x30
INTERNAL DATA ADDRESS SPACE
Figure 8.3. Data Memory Map
8.2.3. General Purpose Registers
The lower 32 bytes of data memory, locations 0x00 through 0x1F, may be addressed as four banks of gen-
eral-purpose registers. Each bank consists of eight byte-wide registers designated R0 through R7. Only
one of these banks may be enabled at a time. Two bits in the program status word, RS0 (PSW.3) and RS1
(PSW.4), select the active register bank (see description of the PSW in SFR Definition 8.4). This allows
fast context switching when entering subroutines and interrupt service routines. Indirect addressing modes
use registers R0 and R1 as index registers.
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相關代理商/技術參數(shù)
參數(shù)描述
C8051F300DK-A 功能描述:DEV KIT FOR F300/301/302/304/305 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產零件編號 系列:- 標準包裝:1 系列:- 類型:MCU 適用于相關產品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、纜線、軟件、數(shù)據表和用戶手冊 其它名稱:520-1035
C8051F300DK-B 功能描述:DEV KIT FOR F300/301/302/304/305 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產零件編號 系列:- 標準包裝:1 系列:- 類型:MCU 適用于相關產品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、纜線、軟件、數(shù)據表和用戶手冊 其它名稱:520-1035
C8051F300DK-E 功能描述:DEV KIT FOR F300/301/302/304/305 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產零件編號 系列:- 標準包裝:1 系列:- 類型:MCU 適用于相關產品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、纜線、軟件、數(shù)據表和用戶手冊 其它名稱:520-1035
C8051F300DK-G 功能描述:8位微控制器 -MCU MCU DEVELOPMENT KIT W/ GLOBAL POWER SPLY RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F300DK-H 功能描述:DEV KIT FOR F300/301/302/304/305 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產零件編號 系列:- 標準包裝:1 系列:- 類型:MCU 適用于相關產品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、纜線、軟件、數(shù)據表和用戶手冊 其它名稱:520-1035
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