參數(shù)資料
型號(hào): C8051F006
廠商: Cygnal Technologies
英文描述: 25 MIPS,32k Flash,2.25k Ram,12bit ADC,48 Pin MCU(25 MIPS,32k 閃速存儲(chǔ)器,2.25k Ram,12位 ADC,48 腳 MCU)
中文描述: 25 MIPS的,32K閃存,2.25k羊,12位ADC,48引腳微控制器(25 MIPS的,32K的閃速存儲(chǔ)器,2.25k羊,12位ADC和48腳微控制器)
文件頁數(shù): 78/170頁
文件大小: 1294K
代理商: C8051F006
Page 78
CYGNAL Integrated Products, Inc.
2001
4.2001; Rev. 1.3
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
PRELIMINARY
10.4.5. Interrupt Register Descriptions
The SFRs used to enable the interrupt sources and set their priority level are described below. Refer to the datasheet
section associated with a particular on-chip peripheral for information regarding valid interrupt conditions for the
peripheral and the behavior of its interrupt-pending flag(s).
Figure 10.9. IE: Interrupt Enable
R/W
EA
Bit7
R/W
IEGF0
Bit6
R/W
ET2
Bit5
R/W
ES
Bit4
R/W
ET1
Bit3
R/W
EX1
Bit2
R/W
ET0
Bit1
R/W
EX0
Bit0
Reset Value
00000000
SFR Address:
0xA8
(bit addressable)
Bit7:
EA: Enable All Interrupts.
This bit globally enables/disables all interrupts. It overrides the individual interrupt mask
settings.
0: Disable all interrupt sources.
1: Enable each interrupt according to its individual mask setting.
Bit6:
IEGF0: General Purpose Flag 0.
This is a general purpose flag for use under software control.
Bit5:
ET2: Enable Timer 2 Interrupt.
This bit sets the masking of the Timer 2 interrupt.
0: Disable all Timer 2 interrupts.
1: Enable interrupt requests generated by the TF2 flag (T2CON.7)
Bit4:
ES: Enable Serial Port (UART) Interrupt.
This bit sets the masking of the Serial Port (UART) interrupt.
0: Disable all UART interrupts.
1: Enable interrupt requests generated by the R1 flag (SCON.0) or T1 flag (SCON.1).
Bit3:
ET1: Enable Timer 1 Interrupt.
This bit sets the masking of the Timer 1 interrupt.
0: Disable all Timer 1 interrupts.
1: Enable interrupt requests generated by the TF1 flag (TCON.7).
Bit2:
EX1: Enable External Interrupt 1.
This bit sets the masking of external interrupt 1.
0: Disable external interrupt 1.
1: Enable interrupt requests generated by the /INT1 pin.
Bit1:
ET0: Enable Timer 0 Interrupt.
This bit sets the masking of the Timer 0 interrupt.
0: Disable all Timer 0 interrupts.
1: Enable interrupt requests generated by the TF0 flag (TCON.5).
Bit0:
EX0: Enable External Interrupt 0.
This bit sets the masking of external interrupt 0.
0: Disable external interrupt 0.
1: Enable interrupt requests generated by the /INT0 pin.
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C8051F007 25 MIPS,32k Flash,2.25k Ram,12bit ADC,32 Pin MCU(25 MIPS,32k 閃速存儲(chǔ)器,2.25k Ram,12位 ADC,32 腳 MCU)
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C8051F007 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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