
4.2001; Rev. 1.3
CYGNAL Integrated Products, Inc. 
 2001
Page 3
C8051F000/1/2/5/6/7 
C8051F010/1/2/5/6/7 
PRELIMINARY 
6. ADC (10-Bit, C8051F010/1/2/5/6/7 Only)........................................................................40 
Figure 6.1.  10-Bit ADC Functional Block Diagram.........................................................................................40 
6.1. Analog Multiplexer and PGA.....................................................................................................................40 
6.2. ADC Modes of Operation..........................................................................................................................41 
Figure 6.2.  10-Bit ADC Track and Conversion Example Timing....................................................................41 
Figure 6.3.  Temperature Sensor Transfer Function..........................................................................................42 
Figure 6.4.  AMX0CF: AMUX Configuration Register (C8051F01x).............................................................42 
Figure 6.5.  AMX0SL: AMUX Channel Select Register (C8051F01x)............................................................43 
Figure 6.6.  ADC0CF: ADC Configuration Register (C8051F01x)..................................................................44 
Figure 6.7.  ADC0CN: ADC Control Register (C8051F01x)...........................................................................45 
Figure 6.8.  ADC0H:  ADC Data Word MSB Register (C8051F01x)..............................................................46 
Figure 6.9.  ADC0L:  ADC Data Word LSB Register (C8051F01x)................................................................46 
6.3. ADC Programmable Window Detector......................................................................................................47 
Figure 6.10.  ADC0GTH: ADC Greater-Than Data High Byte Register (C8051F01x)....................................47 
Figure 6.11.  ADC0GTL: ADC Greater-Than Data Low Byte Register (C8051F01x).....................................47 
Figure 6.12.  ADC0LTH: ADC Less-Than Data High Byte Register (C8051F01x).........................................47 
Figure 6.13.  ADC0LTL: ADC Less-Than Data Low Byte Register (C8051F01x)..........................................47 
Figure 6.14.  10-Bit ADC Window Interrupt Examples, Right Justified Data..................................................48 
Figure 6.15.  10-Bit ADC Window Interrupt Examples, Left Justified Data ....................................................49 
Table 6.1.  10-Bit ADC Electrical Characteristics............................................................................................50 
7. DACs, 12 BIT VOLTAGE MODE...................................................................................51 
Figure 7.1. DAC Functional Block Diagram.....................................................................................................51 
Figure 7.2.  DAC0H: DAC0 High Byte Register..............................................................................................52 
Figure 7.3.  DAC0L: DAC0 Low Byte Register ...............................................................................................52 
Figure 7.4.  DAC0CN: DAC0 Control Register................................................................................................52 
Figure 7.5.  DAC1H: DAC1 High Byte Register..............................................................................................53 
Figure 7.6.  DAC1L: DAC1 Low Byte Register ...............................................................................................53 
Figure 7.7.  DAC1CN: DAC1 Control Register................................................................................................53 
Table 7.1.  DAC Electrical Characteristics .......................................................................................................54 
8. COMPARATORS..............................................................................................................55 
Figure 8.1.  Comparator Functional Block Diagram.........................................................................................55 
Figure 8.2.  Comparator Hysteresis Plot ...........................................................................................................56 
Figure 8.3.  CPT0CN: Comparator 0 Control Register.....................................................................................57 
Figure 8.4.  CPT1CN: Comparator 1 Control Register.....................................................................................58 
Table 8.1.  Comparator Electrical Characteristics.............................................................................................59 
9. VOLTAGE REFERENCE................................................................................................60 
Figure 9.1.  Voltage Reference Functional Block Diagram ..............................................................................60 
Figure 9.2.  REF0CN: Reference Control Register...........................................................................................61 
Table 9.1.  Reference Electrical Characteristics................................................................................................61 
10. CIP-51 CPU........................................................................................................................62 
Figure 10.1.  CIP-51 Block Diagram................................................................................................................62 
10.1. INSTRUCTION SET.............................................................................................................................63 
Table 10.1.  CIP-51 Instruction Set Summary...................................................................................................64 
10.2. MEMORY ORGANIZATION...............................................................................................................67 
Figure 10.2.  Memory Map...............................................................................................................................68 
10.3. SPECIAL FUNCTION REGISTERS....................................................................................................69 
Table 10.2.  Special Function Register Memory Map.......................................................................................69 
Table 10.3.  Special Function Registers............................................................................................................69 
Figure 10.3.  SP: Stack Pointer .........................................................................................................................73 
Figure 10.4.  DPL: Data Pointer Low Byte.......................................................................................................73 
Figure 10.5.  DPH: Data Pointer High Byte......................................................................................................73 
Figure 10.6.  PSW: Program Status Word ........................................................................................................74 
Figure 10.7.  ACC: Accumulator ......................................................................................................................75 
Figure 10.8.  B: B Register................................................................................................................................75