參數(shù)資料
型號(hào): C8051F005
廠商: Cygnal Technologies
英文描述: 25 MIPS,32k Flash,2.25k Ram,12bit ADC,64 Pin MCU(25 MIPS,32k 閃速存儲(chǔ)器,2.25k Ram,12位 ADC,64 腳 MCU)
中文描述: 25 MIPS的,32K閃存,2.25k羊,12位ADC,64引腳微控制器(25 MIPS的,32K的閃速存儲(chǔ)器,2.25k羊,12位ADC和64腳微控制器)
文件頁數(shù): 131/170頁
文件大小: 1294K
代理商: C8051F005
4.2001; Rev. 1.3
CYGNAL Integrated Products, Inc.
2001
Page 131
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
PRELIMINARY
18.1.2. Mode 1: 8-Bit UART, Variable Baud Rate
Mode 1 provides standard asynchronous, full duplex communication using a total of 10 bits per data byte: one start
bit, eight data bits (LSB first), and one stop bit. Data are transmitted from the TX pin and received at the RX pin.
On receive, the eight data bits are stored in SBUF and the stop bit goes into RB8 (SCON.2).
Data transmission begins when an instruction writes a data byte to the SBUF register. The TI Transmit Interrupt
Flag (SCON.1) is set at the end of the transmission (the beginning of the stop-bit time). Data reception can begin
any time after the REN Receive Enable bit (SCON.4) is set to logic 1. After the stop bit is received, the data byte
will be loaded into the SBUF receive register if the following conditions are met: RI must be logic 0, and if SM2 is
logic 1, the stop bit must be logic 1.
If these conditions are met, the eight bits of data are stored in SBUF, the stop bit is stored in RB8 and the RI flag is
set. If these conditions are not met, SBUF and RB8 will not be loaded and the RI flag will not be set. An interrupt
will occur if enabled when either TI or RI are set.
The baud rate generated in Mode 1 is a function of timer overflow. The UART can use either Timer 1 or Timer 2
operating in auto-reload mode to generate the baud rate. On each timer overflow event (a rollover from all ones –
0xFF for Timer 1, 0xFFFF for Timer 2 – to zero) a clock is sent to the baud rate circuit. This clock is divided by 16
to generate the baud rate.
Timer 1 should be configured for
8-bit Counter/Timer with Auto-Reload
mode and its interrupt disabled when used
as a baud rate generator. The combination of system clock frequency and the reload value stored in TH1 determine
the baud rate as follows:
Mode 1 Baud Rate = (2
SMOD
/ 32) * (SYSCLK)/(12
(T1M – 1)
* (256 – TH1)).
The SMOD bit (PCON.7) selects whether or not to divide the Timer 1 overflow rate by two. On reset, the SMOD bit
is logic 0, thus selecting the lower speed baud rate by default. Selecting the timebase used by Timer 1 allows further
control of baud rate generation. Using the system clock divided by one (setting T1M in CKCON) changes the
twelve in the denominator of the equation above to a one.
To use Timer 2 for baud rate generation, configure the timer
Baud Rate Generator
mode and set RCLK and/or
TCLK to logic 1. Setting RCLK and/or TCLK automatically disables Timer 2 interrupts and configures Timer 2 to
use the system clock divided by two as its timebase. If a different timebase is required, setting the C/T2 bit to logic 1
will allow the timebase to be derived from a clock supplied to the external input pin T2. The combination of clock
frequency and the reload value stored in capture registers determine the baud rate as follows:
Mode 1 Baud Rate = SYSCLK / [32 * (65536 – [RCAP2H:RCAP2L]) ],
where [RCAP2H:RCAP2L] is the 16-bit value held in the capture registers.
Figure 18.4. UART Mode 1 Timing Diagram
D1
D0
D2
D3
D4
D5
D6
D7
START
BIT
MARK
STOP
BIT
BIT TIMES
BIT SAMPLING
SPACE
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
C8051F005/0046 制造商:Silicon Laboratories Inc 功能描述:
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C8051F005DK-A 功能描述:DEV KIT FOR C8051F005/F006/F007 RoHS:否 類別:編程器,開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:MCU 適用于相關(guān)產(chǎn)品:Freescale MC68HC908LJ/LK(80-QFP ZIF 插口) 所含物品:面板、纜線、軟件、數(shù)據(jù)表和用戶手冊(cè) 其它名稱:520-1035
C8051F005DK-B 功能描述:DEV KIT FOR C8051F005/F006/F007 RoHS:否 類別:編程器,開發(fā)系統(tǒng) >> 過時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:MCU 適用于相關(guān)產(chǎn)品:Freescale MC68HC908LJ/LK(80-QFP ZIF 插口) 所含物品:面板、纜線、軟件、數(shù)據(jù)表和用戶手冊(cè) 其它名稱:520-1035
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