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參數(shù)資料
| 型號(hào)： | BX80525U733256E |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 733 MHz, MICROPROCESSOR, XMA |
| 文件頁數(shù)： | 59/102頁 |
| 文件大?。?/td> | 878K |
| 代理商： | BX80525U733256E |
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Pentium III Processor for the SC242 at 450 MHz to 800 MHz
6
Datasheet
39
S.E.C.C.2 Packaged Processor Substrate (CPUID 067xh) — Keep In Zones ... 60
40
S.E.C.C.2 Packaged Processor Substrate (CPUID 068xh) — Keep In Zones ... 60
41
S.E.C.C.2 Packaged Processor Substrate (CPUID 067xh) — Keep-Out Zone .. 61
42
S.E.C.C.2 Packaged Processor Substrate (CPUID 068xh) — Keep-Out Zone .. 61
43
Intel Pentium III Processor Markings (S.E.C.C.2 Package) ............................ 62
44
Substrate Deflection Away From Heat Sink ........................................................ 62
45
Substrate Deflection Toward the Heatsink.......................................................... 63
46
S.E.C.C.2 Packaged Processor Specifications................................................... 63
47
Processor Core Pad Via Assignments ................................................................ 73
48
Intel Pentium III Processor S.E.C.C. 2 Via Map .............................................. 84
49
Boxed Intel Pentium III Processor in the S.E.C.C.2 Packaging
(Fan Power Cable Not Shown) ........................................................................... 85
50
Side View Space Requirements for the Boxed Processor with
S.E.C.C.2 Packaging .......................................................................................... 86
51
Front View Space Requirements for the Boxed Processor with
S.E.C.C.2 Packaging .......................................................................................... 86
52
Top View Air Space Requirements for the Boxed Processor.............................. 87
53
Boxed Processor Fan Heatsink Power Cable Connector Description ................ 88
54
Recommended Baseboard Power Header Placement Relative to
Fan Power Connector and Intel Pentium III Processor ................................... 89
Tables
1
Processor Identification......................................................................................... 9
2
Related Documents............................................................................................. 10
3
Voltage Identification Definition .......................................................................... 17
4
System Bus Signal Groups ................................................................................. 19
5
Frequency Select Truth Table for BSEL[1:0] ...................................................... 20
6
Absolute Maximum Ratings (CPUID 067xh) ....................................................... 22
7
Absolute Maximum Ratings (CPUID 068xh) ....................................................... 23
8
Voltage and Current Specifications..................................................................... 24
9
AGTL+ Signal Groups DC Specifications ........................................................... 26
10
Non-AGTL+ Signal Group DC Specifications ..................................................... 27
11
AGTL+ Bus Specifications ................................................................................. 28
12
System Bus AC Specifications (Clock) at Processor Core Pins ........................ 29
13
Valid System Bus, Core Frequency, and Cache Bus Frequencies .................... 30
14
System Bus AC Specifications (AGTL+ Signal Group) at the
Processor Core Pins .......................................................................................... 30
15
System Bus AC Specifications (CMOS Signal Group) at the
Processor Core Pins .......................................................................................... 31
16
System Bus AC Specifications (Reset Conditions) ............................................ 31
17
System Bus AC Specifications (APIC Clock and APIC I/O) at the
Processor Core Pins .......................................................................................... 31
18
System Bus AC Specifications (TAP Connection) at the Processor
Core Pins ........................................................................................................... 32
19
BCLK, PICCLK, and PWRGOOD Signal Quality Specifications at the
Processor Core .................................................................................................. 36
20
100 MHz AGTL+ Signal Group Overshoot/Undershoot Tolerance .................... 40
21
133 MHz AGTL+ Signal Group Overshoot/Undershoot Tolerance .................... 41
22
33 MHz Non-AGTL+ Signal Group Overshoot/Undershoot Tolerance .............. 41
23
Signal Ringback Specifications for Signal Simulation ........................................ 43
24
AGTL+ and Non-AGTL+ Signal Groups Ringback Tolerance Specifications ..... 43
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