參數(shù)資料
型號(hào)： BUK95R2-40B
廠商： NXP Semiconductors N.V.
英文描述： TrenchMOS logic level FET
中文描述： TrenchMOS邏輯電平場(chǎng)效應(yīng)管
文件頁數(shù)： 5/16頁
文件大?。?/td> 137K
代理商： BUK95R2-40B
Philips Semiconductors
BUK95/963R2-40B
TrenchMOS logic level FET
Product data
Rev. 03 — 16 January 2003
5 of 15
9397 750 10844
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
5.
Characteristics
Table 4:
T
j
= 25
°
C unless otherwise specified.
Symbol
Parameter
Static characteristics
V
(BR)DSS
drain-source breakdown
voltage
Characteristics
Conditions
Min
Typ
Max
Unit
I
D
= 0.25 mA; V
GS
= 0 V
T
j
= 25
°
C
T
j
=
55
°
C
40
36
-
-
-
-
V
V
V
GS(th)
gate-source threshold voltage I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
T
j
= 25
°
C
T
j
= 175
°
C
T
j
=
55
°
C
V
DS
= 40 V; V
GS
= 0 V
T
j
= 25
°
C
T
j
= 175
°
C
V
GS
=
±
15 V; V
DS
= 0 V
V
GS
= 5 V; I
D
= 25 A;
Figure 7
and
8
T
j
= 25
°
C
T
j
= 175
°
C
V
GS
= 4.5 V; I
D
= 25 A
V
GS
= 10 V; I
D
= 25 A
1.1
0.5
-
1.5
-
-
2
-
2.3
V
V
V
I
DSS
drain-source leakage current
-
-
-
0.02
-
2
1
500
100
μ
A
μ
A
nA
I
GSS
R
DSon
gate-source leakage current
drain-source on-state
resistance
-
-
-
-
2.7
-
-
2.4
3.2
6
3.5
2.8
m
m
m
m
Dynamic characteristics
Q
g(tot)
total gate charge
Q
gs
gate-to-source charge
Q
gd
gate-to-drain (Miller) charge
C
iss
input capacitance
C
oss
output capacitance
C
rss
reverse transfer capacitance
t
d(on)
turn-on delay time
t
r
rise time
t
d(off)
turn-off delay time
t
f
fall time
L
d
internal drain inductance
V
GS
= 5 V; V
DD
= 32 V;
I
D
= 25 A;
Figure 14
-
-
-
-
-
-
-
-
-
-
-
94
17
37
7877
1397
608
68
268
257
192
4.5
-
-
-
10502
1676
833
-
-
-
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
nH
V
GS
= 0 V; V
DS
= 25 V;
f = 1 MHz;
Figure 12
V
DD
= 30 V; R
L
= 1.2
;
V
GS
= 5 V; R
G
= 10
from drain lead 6 mm from
package to center of die
from contact screw on
mounting base to center of
die SOT78
from upper edge of drain
mounting base to center of
die SOT404
from source lead to source
bond pad
-
3.5
-
nH
-
2.5
-
nH
L
s
internal source inductance
-
7.5
-
nH
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