參數(shù)資料
型號(hào): BD9007HFP
元件分類(lèi): 穩(wěn)壓器
英文描述: 2 A SWITCHING REGULATOR, 505 kHz SWITCHING FREQ-MAX, PSSO7
封裝: ROHS COMPLIANT, HRP-7
文件頁(yè)數(shù): 7/18頁(yè)
文件大?。?/td> 484K
代理商: BD9007HFP
BD9006F, BD9006HFP, BD9007F, BD9007HFP
Technical Note
15/17
www.rohm.com
2009.05 - Rev.A
2009 ROHM Co., Ltd. All rights reserved.
Fig.28 Equivalent circuit
Notes for use
1. Absolute maximum ratings
If excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break
down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated
values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses.
2. GND potential
Ground-GND potential should maintain at the minimum ground voltage level. Furthermore, no terminals should be lower
than the GND potential voltage including electric transients.
3. Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4. Inter-pin shorts and mounting errors
When attaching to the set substrate, pay special attention to the direction and proper placement of the IC. If the IC is attached
incorrectly, it may be destroyed.
Furthermore, when using the IC with VIN and EN/SYNC terminals shorted, and the 5-pin (SOP8 package) or 7-pin (HRP7
package) EN/SYNC terminal and 6-pin RT terminal are shorted, the IC may also be damaged when VIN>7V.
5. Operation in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
6. Inspection with set printed circuit board
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC’s power supply off before connecting it to, or
removing it from a jig or fixture, during the inspection process. Ground the IC during assembly steps as an antistatic
measure. Use similar precaution when transporting and storing the IC.
7. IC pin input (Fig. 26)
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements to keep them isolated. P-N
junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic, creating
a parasitic diode or transistor. For example, the relation between each potential is as follows:
·
When GND>pin A and GND>pin B, the P-N junction operates as a parasitic diode.
·
When pin B >GND>pin A, the P-N junction operates as a parasitic transistor. Parasitic diodes can occur inevitably in
the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, operational
faults, or physical damage. Accordingly, methods by which parasitic diodes operate, such as applying a voltage that is
lower than the GND (P substrate) voltage to an input pin, should not be used.
SW
VIN
SW
VIN
INV
VIN
Internal Power
INV
1k
EN/SYNC
VIN
Internal Power
EN/
SYNC
60k
222
k
145
k
221
k
139
k
FB
VIN
Internal Power
FB
20
1k
RT
VIN
Internal Power
RT
167k
Fig.29 Typical simple construction of monolithic IC
Resistor
Transistor (NPN)
(Terminal A)
(Terminal B)
P Substrate
Parasitic Element
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