參數(shù)資料
型號: BD9007HFP
元件分類: 穩(wěn)壓器
英文描述: 2 A SWITCHING REGULATOR, 505 kHz SWITCHING FREQ-MAX, PSSO7
封裝: ROHS COMPLIANT, HRP-7
文件頁數(shù): 17/18頁
文件大?。?/td> 484K
代理商: BD9007HFP
BD9006F, BD9006HFP, BD9007F, BD9007HFP
Technical Note
8/17
www.rohm.com
2009.05 - Rev.A
2009 ROHM Co., Ltd. All rights reserved.
Description of operations
·
ERROR AMP
The ERROR AMP block is an error amplifier used to input the reference voltage (0.8V Typ.) and the INV pin voltage. The
output FB pin controls the switching duty and output voltage Vo. These INV and FB pins are externally mounted to
facilitate phase compensation. Inserting a capacitor and resistor between these pins enables adjustment of phase margin.
(Refer to recommended examples on pages 11~13.)
·
SOFT START
The SOFT START block provides a function to prevent the overshoot of the output voltage Vo through gradually
increasing the normal rotation input of the error amplifier when power supply turns ON to gradually increase the switching
Duty. The soft start time is set to 5msec (Typ.).
·
SYNC
By making the “EN/SYNC” terminal less than 0.8V, the circuit can be shut down.
Furthermore, by applying pulse with higher frequency than the configured oscillation frequency to the “EN/SYNC”
terminal, external sync is possible. (Sync possible with double the configured frequency-configured frequency or 500kHz)
·
OSC(Oscillator)
This circuit generates the pulse wave to be input to the slope, and by connecting resistance to “RT”, 50~500kHz
oscillating frequency can be configured. (Refer to p.11 Fig.24)
·
slope
This block generates saw tooth waves from the clock generated by the OSC. The generated saw tooth waves are sent
to PWM COMPARATOR.
·
PWM COMPARATOR
The PWM COMPARATOR block is a comparator to make comparison between the FB pin and internal saw tooth wave
and output a switching pulse
The switching pulse duty varies with the FB value. (min Duty width : 250ns.)
·
TSD (Thermal Shut Down)
In order to prevent thermal destruction/thermal runaway of the IC, the TSD block will turn OFF the output when the chip
temperature reaches approximately 150℃ or more. When the chip temperature falls to a specified level, the output will be
reset. However, since the TSD is designed to protect the IC, the chip junction temperature should be provided with the
thermal shutdown detection temperature of less than approximately.150℃.
·
CURRENT LIMIT
While the output POWER P-ch MOS FET is ON, if the voltage between drain and source (ON resistance×load current)
exceeds the reference voltage internally set with the IC, this block will turn OFF the output to latch. The overcurrent
protection detection values have been set as shown below:
BD9006F,BD9006HFP, BD9007F,BD9007HFP ··· 4A (Typ.)
Furthermore, since this overcurrent protection is an automatically reset, after the output is turned OFF and latched, the
latch will be reset with the RESET signal output by each oscillation frequency.
However, this protection circuit is only effective in preventing destruction from sudden accident. It does not support for the
continuous operation of the protection circuit (e.g. if a load, which significantly exceeds the output current capacitance, is
normally connected). Furthermore, since the overcurrent protection detection value has negative temperature
characteristics, consider thermal design.
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