參數(shù)資料
型號(hào): ATAM893T-TKS
廠商: Atmel
文件頁(yè)數(shù): 4/98頁(yè)
文件大?。?/td> 0K
描述: IC MON TIRE-PRESS ATARX9X SER
標(biāo)準(zhǔn)包裝: 830
系列: MARC4
核心處理器: MARC4
芯體尺寸: 4-位
速度: 4MHz
連通性: SSI(2 線,3 線)
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲(chǔ)器容量: 4KB(4K x 8)
程序存儲(chǔ)器類型: EEPROM
EEPROM 大?。?/td> 64 x 16
RAM 容量: 256 x 4
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 6.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 管件
12
4680C–4BMCU–01/05
ATAM893-D
Figure 4-7.
Reset Configuration
4.3.1
Power-on Reset and Brown-out Detection
The ATAM893-D has a fully integrated power-on reset and brown-out detection circuitry. For
reset generation no external components are needed.
These circuits ensure that the core is held in the reset state until the minimum operating supply
voltage has been reached. A reset condition will also be generated should the supply voltage
drop momentarily below the minimum operating level except when a power down mode is acti-
vated (the core is in SLEEP mode and the peripheral clock is stopped). In this power-down
mode the brown-out detection is disabled. Two values for the brown-out voltage threshold are
programmable via the BOT bit in the SC register.
A power-on reset pulse is generated by a V
DD rise across the default BOT voltage level (1.7 V).
A brown-out reset pulse is generated when V
DD falls below the brown-out voltage threshold. Two
values for the brown-out voltage threshold are programmable via the BOT bit in the SC register.
When the controller runs in the upper supply voltage range with a high system clock frequency,
the high threshold must be used. When it runs with a lower system clock frequency, the low
threshold and a wider supply voltage range may be chosen. For further details, see the electrical
specification and the SC register description for BOT programming.
Reset
timer
V
DD
CL
Power-on
reset
Internal
reset
res
CL = SYSCL/4
Brown-out
detection
Watch-
dog
CWD
res
Ext. clock
supervisor
ExIn
Pull-up
NRST
V
DD
V
SS
V
DD
V
SS
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