參數(shù)資料
型號: ATAM893T-TKS
廠商: Atmel
文件頁數(shù): 20/98頁
文件大?。?/td> 0K
描述: IC MON TIRE-PRESS ATARX9X SER
標準包裝: 830
系列: MARC4
核心處理器: MARC4
芯體尺寸: 4-位
速度: 4MHz
連通性: SSI(2 線,3 線)
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: EEPROM
EEPROM 大小: 64 x 16
RAM 容量: 256 x 4
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 6.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 管件
27
4680C–4BMCU–01/05
ATAM893-D
5.2.3
Bi-directional Port 5
As all other bi-directional ports, this port includes a bit-wise programmable Control Register
(P5CR), which allows the individual programming of each port bit as input or output. It also
opens up the possibility of reading the pin condition when in output mode. This is a useful fea-
ture for self testing and for serial bus applications.
The port pins can also be used as external interrupt inputs (see Figure 5-4 and Figure 5-5 on
page 28). The interrupts (INT1 and INT6) can be masked or independently configured to trigger
on either edge. The interrupt configuration and port direction is controlled by the Port 5 Control
Register (P5CR). An additional low resistance pull-up/-down transistor mask option provides an
internal bus pull-up for serial bus applications.
The Port 5 Data Register (P5DAT) is I/O mapped to the primary address register of address ’5’h
and the Port 5 Control Register (P5CR) to the corresponding auxiliary register. The P5CR is a
byte-wide register and is configured by writing first the low nibble and then the high nibble (see
Figure 5-4.
Bi-directional Port 5
Master reset
Q
V
DD
BP5y
(1) Flash options
P5DATy
I/O Bus
D
IN enable
I/O Bus
(1)
Switched
pull-up
Switched
pull-down
Static
pull-up
(Data out)
S
Static
Pull-down
V
DD
V
DD
(1)
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