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| 型號： | ATAM893T-TKS |
| 廠商： | Atmel |
| 文件頁數(shù)： | 15/98頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MON TIRE-PRESS ATARX9X SER |
| 標(biāo)準(zhǔn)包裝： | 830 |
| 系列： | MARC4 |
| 核心處理器： | MARC4 |
| 芯體尺寸： | 4-位 |
| 速度： | 4MHz |
| 連通性： | SSI（2 線，3 線） |
| 外圍設(shè)備： | 欠壓檢測/復(fù)位，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 16 |
| 程序存儲器容量： | 4KB（4K x 8） |
| 程序存儲器類型： | EEPROM |
| EEPROM 大小： | 64 x 16 |
| RAM 容量： | 256 x 4 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.8 V ~ 6.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 20-SOIC（0.209"，5.30mm 寬） |
| 包裝： | 管件 |
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22
4680C–4BMCU–01/05
ATAM893-D
5.
Peripheral Modules
5.1
Addressing Peripherals
Accessing the peripheral modules takes place via the I/O bus (see Figure 5-1). The IN or OUT
instructions allow direct addressing of up to 16 I/O modules. A dual register addressing scheme
has been adopted to enable direct addressing of the primary register. To address the auxiliary
register, the access must be switched with an auxiliary switching module. Thus, a single IN (or
OUT) to the module address will read (or write into) the module primary register. Accessing the
auxiliary register is performed with the same instruction preceded by writing the module address
into the auxiliary switching module. Byte wide registers are accessed by multiple IN- (or OUT-)
instructions. For more complex peripheral modules, with a larger number of registers, extended
addressing is used. In this case a bank of up to 16 subport registers are indirectly addressed
with the subport address. The first OUT-instruction writes the subport address to the subaddress
register, the second IN- or OUT-instruction reads data from or writes data to the addressed
subport.
Figure 5-1.
Example of I/O Addressing
Subaddress Reg.
Subport FH
I/O bus
Aux. Reg.
Bank of
Primary Regs.
Primary Reg.
(Address Pointer)
Auxiliary Switch
Module
Indirect Subport Access
to other modules
1
2
(Subport Register Write)
3
4
5
1
2
3
6
4
5
Example of
qFORTH
Program
Code
1
2
4
5
3
6
Addr. (ASW) = Auxililiary Switch Module Address
1
2
1
2
4
5
(Auxiliary Register Write)
Module ASW
Module M1
Module M2
Module M3
Subport EH
Primary Reg.
Subport 1
Subport 0
Dual Register Access
Single Register Access
Addr. (SPort) Addr. (M1) OUT
SPort_Data
Addr. (M1)
OUT
(Subport Register Read)
Addr. (SPort) Addr. (M1) OUT
Addr. (M1) IN
(Subport Register Write Byte)
Addr. (SPort) Addr. (M1) OUT
SPort_Data (lo) Addr. (M1)
OUT
SPort_Data (hi) Addr. (M1)
OUT
(Subport Register Read Byte)
Addr. (SPort) Addr. (M1) OUT
Addr. (M1) IN (hi)
Addr. (M1) IN (lo)
(Primary Register Write)
Prim._Data Addr. (M2) OUT
Addr. (M2) Addr. (ASW) OUT
Aux._Data Addr. (M2) OUT
(Primary Register Read)
Addr. (M2) IN
(Auxiliary Register Read )
Addr. (M2) Addr. (ASW) OUT
Addr. (M2) IN
(Auxiliary Register Write Byte)
Addr. (M2) Addr. (ASW) OUT
Aux._Data (lo) Addr. (M2)
OUT
Aux._Data (hi) Addr. (M2)
OUT
(Primary Register Write)
Prim._Data Addr. (M3) OUT
(Primary Register Read)
Addr. (M3) IN
Addr. (Mx) = Module Mx Address
Addr. (SPort) = Subport Address
Prim._Data = Data to be written into Primary Register
Aux._Data = Data to be written into Auxiliary Register
Aux._Data (lo) = Data to be written into Auxiliary Register (low nibble)
Aux._Data (hi) = Data to be written into Auxiliary Register (high nibble)
SPort_Data (lo) = Data to be written into Subport (low nibble)
SPort_Data (hi) = Data to be written into Subport (high nibble)
(lo) = SPort_Data (low nibble)
(hi) = SPort_Data (high nibble)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| ATAM893T-TKSYD | 功能描述:4位微控制器 - MCU Marc4 micrium 4k FLASH RoHS:否 最大時鐘頻率:32 KHz/4 MHz 程序存儲器大小:4 KB 封裝 / 箱體:SSO-20 制造商:Atmel 核心:MARC4 數(shù)據(jù)總線寬度:4 bit 安裝風(fēng)格:SMD/SMT |
| ATAM893X-TKHYZ | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Flash Version for ATAR080, ATAR090/890 and ATAR092/892 |
| ATAM893X-TKQYZ | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Flash Version for ATAR080, ATAR090/890 and ATAR092/892 |
| ATAM893X-TKSYZ | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Flash Version for ATAR080, ATAR090/890 and ATAR092/892 |
| ATAM894 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8k-flash Microcontroller |
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