參數(shù)資料
型號： AT89C51IC2-SLSIL
廠商： Atmel
文件頁數(shù)： 65/140頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 32K 44PLCC
標準包裝： 27
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： I²C，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 34
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
RAM 容量： 1.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
30
AT89C51IC2
4301D–8051–02/08
Timer 2
The Timer 2 in the AT89C51IC2 is the standard C52 the Timer 2.
It is a 16-bit timer/counter: the count is maintained by two eight-bit timer registers, TH2
and TL2 are cascaded. It is controlled by T2CON (Table 24) and T2MOD (Table 25)
registers. Timer 2 operation is similar to Timer 0 and Timer 1. C/T2 selects FOSC/12
(timer operation) or external pin T2 (counter operation) as the timer clock input. Setting
TR2 allows TL2 to be incremented by the selected input.
Timer 2 has 3 operating modes: capture, autoreload and Baud Rate Generator. These
modes are selected by the combination of RCLK, TCLK and CP/RL2 (T2CON).
Refer to the Atmel 8-bit Microcontroller Hardware description for the description of Cap-
ture and Baud Rate Generator Modes.
Timer 2 includes the following enhancements:
Auto-reload mode with up or down counter
Programmable clock-output
Auto-Reload Mode
The auto-reload mode configures timer 2 as a 16-bit timer or event counter with auto-
matic reload. If DCEN bit in T2MOD is cleared, timer 2 behaves as in 80C52 (refer to the
Atmel 8-bit Microcontroller Hardware description). If DCEN bit is set, timer 2 acts as an
Up/down timer/counter as shown in Figure 9. In this mode the T2EX pin controls the
direction of count.
When T2EX is high, timer 2 counts up. Timer overflow occurs at FFFFh which sets the
TF2 flag and generates an interrupt request. The overflow also causes the 16-bit value
in RCAP2H and RCAP2L registers to be loaded into the timer registers TH2 and TL2.
When T2EX is low, timer 2 counts down. Timer underflow occurs when the count in the
timer registers TH2 and TL2 equals the value stored in RCAP2H and RCAP2L registers.
The underflow sets TF2 flag and reloads FFFFh into the timer registers.
The EXF2 bit toggles when timer 2 overflows or underflows according to the direction of
the count. EXF2 does not generate any interrupt. This bit can be used to provide 17-bit
resolution.
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