參數(shù)資料
型號(hào)： AND8020D
廠商： Analog Devices, Inc.
英文描述： Termination of ECL Logic Devices with EF (Emitter Follower) OUTPUT Structure
中文描述： ECL邏輯器件的終止與英法（發(fā)射極跟隨器）輸出結(jié)構(gòu)
文件頁(yè)數(shù)： 9/18頁(yè)
文件大?。?/td> 168K
代理商： AND8020D
AND8020/D
http://onsemi.com
9
SECTION 3. THEVENIN EQUIVALENT PARALLEL TERMINATION
R
R
R
R
Although the single resistor termination to V
TT
conserves
power, it requires an additional supply voltage. An alternate
approach to using a V
TT
power supply is to use a resistor
divider network as shown in Figure 12 to develop a
Thevenin voltage, V
TT
, and provide a parallel impedance
matching AC termination, the Thevenin parallel
termination.
Figure 12. Thevenin Equivalent Parallel Termination
V
EE
TLine Z
0
Driver
R2
R1
*
V
CC
Receiver
R2
R2
R1
*
R1
Driver
Receiver
TLine Z
0
TLine Z
0
V
EE
V
CC
or Twisted Pair
VTT
VCC
2.0V
R2
R1
VCC
R2
*
*
*
*
*
(eq. 13)
Differential ECL outputs can be terminated as independent
complimentary singleended lines. Both sides of a
differential pair must be terminated. Balanced, symmetrical
loading of each line must be preserved.
While a Thevenin Parallel technique dissipates more
termination power, it does not require the additional V
TT
supply. This additional power is consumed entirely in the
external resistor divider network and thus will not change
the current being sourced by the device, hence it does not
alter the IC reliability or lifetime. As with standard parallel
termination, variance of V
TT
and V
CC
supplies must be
considered.
The Thevenin equivalent of the two resistors needs to be
equal to the characteristic impedance of the signal
transmission line. Calculated values for resistors R1 and R2
may be obtained from the following relationships.
VCC
VCC
R2
Z0
VEE
VTT
(eq. 14)
R1
R2
VCC
VTT
VTT
VEE
(eq. 15)
Where:
V
TT
= V
CC
2.0 V
Z
0
= Characteristic Impedance of the Signal
Transmission Line
For a typical V
CC
= 5.0 V PECL scheme, where V
EE
=
GND, V
TT
= 3.0 V, and Z
0
= 50 :
5
5
R2
50
0
3
125
(eq. 16)
R1
125
5
3
3
0
83.3
(eq. 17)
and crosschecking for V
TT
:
VTT
5
125
125
83.3
3.0 V
(eq. 18)
VTT
VCC
2.0 V
3.0 V
(eq. 19)
For the typical V
CC
= 3.3 V LVPECL scheme, where
V
EE
= GND, V
TT
= 1.3 V, and Z
0
= 50 :
3.3
3.3
R2
50
0
1.3
82.5
(eq. 20)
R1
82.5
3.3
1.3
1.3
0
126
(eq. 21)
and crosschecking for V
TT
:
VTT
3.3
82.5
126
82.5
1.3 V
(eq. 22)
VTT
VCC
2.0 V
1.3 V
(eq. 23)
Table D. Thevenin Term Table
|V
CC
V
EE
| = 5.0 V
Z
0
R1
50
83
|V
CC
V
EE
| = 3.3 V
Z
0
R1
50
127
|V
CC
V
EE
| = 2.5 V
Z
0
R1
50
250
R2
R2
R2
125
83
62.5
70
117
175
70
178
115
70
350
87.5
75
125
188
75
190
123
75
375
93.8
80
133
200
80
203
132
80
400
100
90
150
225
90
229
149
90
450
112.5
100
167
250
100
253
165
100
500
125.5
120
200
300
120
305
198
120
600
150
150
250
375
150
381
248
150
750
187.5
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