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參數(shù)資料
| 型號(hào)： | AM79C32AJC |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Digital Subscriber Controller⑩ (DSC⑩) Circuit |
| 中文描述： | DATACOM, DIGITAL SLIC, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 19/101頁 |
| 文件大?。?/td> | 1607K |
| 代理商： | AM79C32AJC |
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Am79C30A/32A Data Sheet
19
LIU Mode Register (LMR1), Read/Write
Address = Indirect A3H
LMR1 is defined in Table 12.
Notes:
The F and F
A
bits in LMR1 (bits 2 and 3) should be enabled during the activation procedure so the Am79C30A/32A can respond
with INFO 3.
LMR1 bit 4 is used to transfer the signals PH-AR and Expiry of Timer from the microprocessor to the LIU (see CCITT I.430 state
diagram—activation request). PH-AR is defined as bit 4 being a logical 1 and Expiry of Timer is defined as the transition of bit 4
from a logical 1 to a logical 0. This bit must not be set until the LIU, as reflected in the LSR, is in state F3, F6, or F7 and the
receiver has been enabled for a minimum of 250 μs.
LMR1 bit 6 is primarily used to disable the receiver when the terminal does not require access to the S Interface signals. This bit
is cleared by reset and must be written to logical 1 in order to receive activation from the S Interface, or to request activation.
LIU Mode Register 2 (LMR2), Read/Write
Address = Indirect A4H
LMR2 is used to select the operations found in Table 13.
Table 12.
LIU Mode Register 1
Bit
Logical 1
Logical 0 (default value)
0
Enable B1 transmit
Disable B1 transmit
1
Enable B2 transmit
Disable B2 transmit
2
Disable F transmit
Enable F transmit
3
Disable F
A
transmit
Activation request
Enable F
A
transmit
No activation request
4
5
Go from F8 to F3
No transition
6
Enable receiver/transmitter
Disable receiver/transmitter
7
Reserved; must be set to logical 0
Reserved; must be set to logical 0
Table 13.
LIU Mode Register 2
Bit
Logical 1
Logical 0 (Default Value)
0
D-channel loopback at Am79C30A/32A enable
D-channel loopback at Am79C30A/32A disable
1
D-channel loopback at LIU enable
D-channel loopback at LIU disable
2
D-channel back-off disable
D-channel back-off enable
3
F3 change of state interrupt enable
F3 change of state interrupt disable
4
F8 change of state interrupt enable
F8 change of state interrupt disable
5
HSW interrupt enable
HSW interrupt disable
6
F7 change of state interrupt enable
F7 change of state interrupt disable
7
Reserved; must be set to logical 0
Reserved; must be set to logical 0
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相關(guān)代理商/技術(shù)參數(shù) |
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| AM79C32AJC/D | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: 制造商:AMD 功能描述: |
| AM79C32AJC/E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AM79C32AJC/E4 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AM79C32AJCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN Line Interface |
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