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參數(shù)資料
| 型號(hào)： | AM79C32A |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Digital Subscriber Controller⑩ (DSC⑩) Circuit |
| 中文描述： | 數(shù)字用戶控制器⑩法（DSC⑩）電路 |
| 文件頁(yè)數(shù)： | 54/101頁(yè) |
| 文件大?。?/td> | 1607K |
| 代理商： | AM79C32A |
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54
Am79C30A/32A Data Sheet
Intelligent NT
Either Slave mode can be used to implement the Intel-
ligent NT configuration. The diagram below depicts this
configuration using DSC Slave mode with bus reversal
disabled.
The U-transceiver operates as the IOM-2 master de-
vice, programmed to TE mode and outputting at
1536-kHz DCL. The DSC indicates a D-channel re-
quest according to the TIC bus procedure using the
BAC bit on the DU line (BAC=0). The S-transceiver sur-
veys the received D channel and if it is idle, enables the
DSC to send its D-channel frame to the U-transceiver
on DU by driving S/G low on DD. The S-transceiver
also sets its transmitted E-channel bits on the S-Inter-
face to zero (inversion of received D bits) to prevent all
connected TEs from transmitting data into the D-chan-
nel. When the DSC completes its D-channel transmis-
sion, it releases the TIC bus by setting BAC=1. The
S-transceiver then mirrors the incoming D bits into the
E-channel, thus behaving as a normal NT with trans-
parent D-channel handling.
DSC
SBOUT
SBIN
D-channel
E-channel
DD
DU
B1, B2, D, MON0, C/I0,
IC1, IC2, MON1, C/I1, S/G(in), TIC(out)
upstream
downstream
Figure 11.
IOM-2 Intelligent Configuration
DOUT/DD
DIN/DU
U-transceiver
Master
S-transceiver
LT-S
S Interface
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相關(guān)代理商/技術(shù)參數(shù) |
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| AM79C32AJC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Digital Subscriber Controller⑩ (DSC⑩) Circuit |
| AM79C32AJC/D | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: 制造商:AMD 功能描述: |
| AM79C32AJC/E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AM79C32AJC/E4 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AM79C32AJCB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN Line Interface |
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