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參數(shù)資料
| 型號(hào)： | AM29LV2562ML120RPII |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 512 Megabit (16 M x 32-Bit/32 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control |
| 中文描述： | 16M X 32 FLASH 3V PROM, 120 ns, PBGA80 |
| 封裝： | 18 X 12 MM, FBGA-80 |
| 文件頁數(shù)： | 53/69頁 |
| 文件大?。?/td> | 1451K |
| 代理商： | AM29LV2562ML120RPII |
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October 9, 2003
Am29LV2562M
51
P R E L I M I N A R Y
AC CHARACTERISTICS
Read-Only Operations
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 13 for test specifications.
3. AC specifications listed are tested with V
IO
= V
CC
. Contact AMD for information on AC operation when V
IO
≠
V
CC
.
Parameter
Description
Test Setup
Speed Options
JEDEC
Std.
120R
Unit
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
120
ns
t
AVQV
t
ACC
Address to Output Delay
CE#, OE# = V
IL
Max
120
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
120
ns
t
PACC
Page Access Time
Max
30
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
30
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
Max
25
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
Max
25
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or OE#,
Whichever Occurs First
Min
0
ns
t
OEH
Output Enable Hold
Time (Note 1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
t
OH
t
CE
Outputs
WE#
Addresses
CE#
OE#
HIGH Z
Output Valid
HIGH Z
Addresses Stable
t
ACC
t
RC
t
OEH
t
RH
t
OE
t
RH
0 V
RY/BY#
RESET#
t
DF
Figure 13.
Read Operation Timings
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