參數(shù)資料
型號: AM29LV2562ML120RPII
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 512 Megabit (16 M x 32-Bit/32 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control
中文描述: 16M X 32 FLASH 3V PROM, 120 ns, PBGA80
封裝: 18 X 12 MM, FBGA-80
文件頁數(shù): 44/69頁
文件大小: 1451K
代理商: AM29LV2562ML120RPII
42
Am29LV2562M
October 9, 2003
P R E L I M I N A R Y
Table 11.
Command Definitions (x16 Mode, WORD# = V
IL
)
Legend:
X = Don’t care
RA = Read Address of the memory location to be read.
RD = Read Data read from location RA during read operation.
PA = Program Address. Addresses latch on the falling edge of the WE#
or CE# pulse, whichever happens later.
PD = Program Data for location PA. Data latches on the rising edge of
WE# or CE# pulse, whichever happens first.
SA = Sector Address of sector to be verified (in autoselect mode) or
erased. Address bits A23–A15 uniquely select any sector.
WBL = Write Buffer Location. Address must be within the same write
buffer page as PA.
WC = Word Count. Number of write buffer locations to load minus 1.
Notes:
1.
2.
3.
See Table 1 for description of bus operations.
All values are in hexadecimal.
Except for the read cycle and the fourth cycle of the autoselect
command sequence, all bus cycles are write cycles.
Data bits DQ31–DQ15 are don’t care in command sequences.
Unless otherwise noted, address bits A23–A11 are don’t cares.
No unlock or command cycles required when device is in read
mode.
The Reset command is required to return to the read mode (or to
the erase-suspend-read mode if previously in Erase Suspend)
when the device is in the autoselect mode, or if DQ5 and/or
DQ13goes high while the device is providing status information.
The fourth cycle of the autoselect command sequence is a read
cycle. Data bits DQ31–DQ16 are don’t care. See the Autoselect
Command Sequence section for more information.
The device ID must be read in three cycles.
10. If WP# protects the highest address sector, the data is 9898h for
factory locked and 1818h for not factory locked. If WP# protects
the lowest address sector, the data is 8888h for factory locked
and 0808h for not factor locked.
4.
5.
6.
7.
8.
9.
11. The total number of cycles in the command sequence is
determined by the number of words written to the write buffer. The
maximum number of cycles in the command sequence is 37.
12. The data is 0000h for an unprotected sector group and 0101h for
a protected sector group.
13. Command sequence resets device for next command after
aborted write-to-buffer operation.
14. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
15. The Unlock Bypass Reset command is required to return to the
read mode when the device is in the unlock bypass mode.
16. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation.
17. The Erase Resume command is valid only during the Erase
Suspend mode.
18. Command is valid when device is ready to read array data or when
device is in autoselect mode.
Command
Sequence
(Note 1)
C
Bus Cycles (Notes 2–5)
Third
Addr
Data
First
Second
Addr
Fourth
Fifth
Sixth
Addr
RA
XXX
AAA
AAA
Data
RD
F0F0
AAAA
AAAA
Data
Addr
Data
Addr
Data
Addr
Data
Read (Note 6)
Reset (Note 7)
Manufacturer ID
Device ID (Note 9)
SecSi
TM
Sector Factory Protect
(Note 10)
1
1
4
6
A
Enter SecSi Sector Region
Exit SecSi Sector Region
Program
Write to Buffer (Note 11)
Program Buffer to Flash
Write to Buffer Abort Reset (Note 13)
Unlock Bypass
Unlock Bypass Program (Note 14)
Unlock Bypass Reset (Note 15)
Chip Erase
Sector Erase
Program/Erase Suspend (Note 16)
Program/Erase Resume (Note 17)
CFI Query (Note 18)
555
555
5555
5555
AAA
AAA
9090
9090
X00
X02
0101
7E7E
X1C
1212
X1E
0101
4
AAA
AAAA
555
5555
AAA
9090
X06
(Note 10)
Sector Group Protect Verify
(Note 12)
4
AAA
AAAA
555
5555
AAA
9090
(SA)X04
0000/
0101
3
4
4
3
1
3
3
2
2
6
6
1
1
1
AAA
AAA
AAA
AAA
SA
AAA
AAA
XXX
XXX
AAA
AAA
XXX
XXX
AA
AAAA
AAAA
AAAA
AAAA
2929
AAAA
AAAA
A0A0
9090
AAAA
AAAA
B0B0
3030
9898
555
555
555
555
5555
5555
5555
5555
AAA
AAA
AAA
SA
8888
9090
A0A0
2525
XXX
PA
SA
0000
PD
WC
PA
PD
WBL
PD
555
555
PA
XXX
555
555
5555
5555
PD
0000
5555
5555
AAA
AAA
F0F0
2020
AAA
AAA
8080
8080
AAA
AAA
AAAA
AAAA
555
555
5555
5555
AAA
SA
1010
3030
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