參數(shù)資料
型號(hào)： AKD4564
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： 16BIT CODEC WITH BUILT-IN ALC AND MIC/HP/SPK-AMP
中文描述： 16位編解碼器，配有ALC和麥克風(fēng)/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù)： 40/48頁
文件大?。?/td> 382K
代理商： AKD4564
ASAHI KASEI
[AK4564]
MS0140-E-01
2002/07
- 40 -
ALC
Mode
Control
1
Addr
07H
ALC Mode Control 1
Default
LMAT1-0: ALC1 Limiter ATT Step
The IVOL value is attenuated when the input signal exceeds the ALC1 limiter detection level. The number
of step to attenuate is decided by output level.
ALC1Limiter ATT Step
LMAT1
LMAT0
ALC1 Output
≥
LMTH
0
0
1
0
1
2
1
0
2
1
1
2
Table 18. ALC1 Limiter ATT Step
RGAIN1-0: ALC1 Recovery GAIN Step
During the ALC1 recovery operation, the number of steps changed from current IVOL value is set. For
example, when the current IVOL value is 30H, RGAIN1-0= “01” are set, IVOL changes to 32H by the
auto limiter operation, the input signal level is gained by 0.75dB (=0.375dB x 2).
When the IVOL value exceeds the reference level (REF7-0), the IVOL value does not increase.
RGAIN1
RGAIN0
0
0
0
1
1
0
1
1
Table 19. ALC1 Recovery GAIN Step
FDATT1-0: FADEIN/OUT ATT Step Setting
During the FADEIN/OUT operation, the number of steps changed from current IVOL value is set.
FDATT1
FDATT0
0
0
0
1
1
0
1
1
Table 20. FADEIN/OUT ATT Step Setting
GSEL: Select IVOL gain
0: MIC (Default)
1: LINE
Register Name
D7
0
0
D6
GSEL
0
D5
D4
D3
D2
D1
D0
FDATT1 FDATT0
RGAIN1 RGAIN0 LMAT1 LMAT0
0
0
0
0
0
0
ALC1 Output
≥
FS
1
2
2
4
ALC1 Output
≥
FS + 6dB
1
2
4
4
ALC1 Output
≥
FS + 12dB
1
2
4
8
Default
GAIN STEP
1
2
3
4
Default
ATT STEP
1
2
3
4
Default
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