參數(shù)資料
型號: AKD4564
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 16BIT CODEC WITH BUILT-IN ALC AND MIC/HP/SPK-AMP
中文描述: 16位編解碼器,配有ALC和麥克風/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù): 20/48頁
文件大?。?/td> 382K
代理商: AKD4564
ASAHI KASEI
[AK4564]
MS0140-E-01
2002/07
- 20 -
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Output Digital Volume (OATT)
Attenuation range of the output digital volume is 0dB to -65.25dB with MUTE, and the step width is 0.75dB. When ZEC
bit is “1”, the attenuation level is changed by zero crossing detection or zero crossing timeout operation. Zero crossing
timeout period is set by TM1-0 bits and FSTM bit. When ZCE is “0”, it is changed immediately without zero crossing
detection.
Channel independent zero crossing detection is used. If new value is written to the OATT register before OATT changes
by zero crossing or timeout, the previous value becomes invalid. When the OATT register is written continually, it should
take an interval of zero crossing timeout and over.
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LINEOUT
LINEOUT signals are output from LOUT1/ROUT1 and LOUT2/ROUT2 pins. The output gain is set by VOL1 and VOL2
bits. The common voltage of these outputs is HVCM voltage and load resistance is min. 10k
. The Power supply voltage
for LINEOUT-Amp is supplied from HVDD pin. The output level of LINEOUT is constant regardless of HVDD voltage.
When the voltage of HVDD pin is low, the distortion of LINEOUT degrades.
When LINEOUTs are muted by AOUT1 or AOUT2 bit, the outputs become HVCM voltage and the amps go to
Power-Save-Mode. When AOUTP1 (AOUTP2) bit is “0”, LINEOUT-Amps become Power-Down-Mode and the output
signal goes to Hi-Z.
When PDN pin changes from “L” to “H” after power-up, LINEOUT-Amps become Power-Save-Mode. In
Power-Save-Mode, LOUT1/ROUT1 (LOUT2/ROUT2) pins gradually become HVCM voltage via an internal resistor
(typ.200k
) from Hi-Z to decrease a pop noise. When Power OFF, the pop noise can be decreased by using
Power-Save-Mode.
相關PDF資料
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