參數(shù)資料
型號： AKD4564
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： 16BIT CODEC WITH BUILT-IN ALC AND MIC/HP/SPK-AMP
中文描述： 16位編解碼器，配有ALC和麥克風/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù)： 31/48頁
文件大?。?/td> 382K
代理商： AKD4564
ASAHI KASEI
[AK4564]
MS0140-E-01
2002/07
- 31 -
n
Control Register WRITE Timing
The data on the 3 wires serial interface consists of op-code (3bit), address (MSB-first, 5bit) and control data (MSB-first,
8bit). The transmitting data is output to each bit by “
↓
” of CCLK, the receiving data is latched by “
↑
” of CCLK. Writing
data becomes effective by “
↑
” of CSN.
CCLK always needs 16 edges of “
-
” during CSN = “L”. PDN pin = “L” resets the registers to their
defalut values.Only write to address 00H to 0CH. Writing to the control registers except for op2-0 bit
=“101” are ignored.
CSN
CCLK
0
1
2
3
4
5
6
7
8
9
10
11 12
13
14 15
CDTI
op2 op1
“1”
A2
A3
A1 A0
A4
D7 D6 D5 D4 D3 D2 D1 D0
op0
“1”
op2-op0: Op code (101:WRITE)
A4-A0:
Register Address
D7-D0:
Control data
“0”
Figure 25. Control Data Timing
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