參數資料
型號: AK5701KN
廠商: Asahi Kasei Microsystems Co.,Ltd
英文描述: 16-Bit ツヒ Stereo ADC with PLL & MIC-AMP
中文描述: 16位ツヒ立體聲ADC帶鎖相環(huán)
文件頁數: 47/64頁
文件大?。?/td> 747K
代理商: AK5701KN
[AK5701]
SYSTEM DESIGN
Figure 43
and
Figure 44
shows the system connection diagram for the AK5701. The evaluation board [AKD5701]
demonstrates the optimum layout, power supply arrangements and measurement results.
MPWR
RIN2
LIN2
RIN1
LIN1
VCOC
P
C
C
C
M
E
V
A
A
D
D
B
EXLRCK
EXSDTI
MCKO
CSP
SDTO
LRCK
AK5701
Top View
19
20
21
22
23
24
1
1
1
1
12
11
10
9
8
7
1
1
1
2
3
4
5
6
2
2
2
2
External MIC
Internal MIC
0
2
0
Power Supply
2.4
3.6V
DSP
μ
P
Rp
Analog Ground
Digital Ground
0
1
1
Power Supply
1.6
3.6V
Cp
0.1 x Cp
(Note)
DSP
1u
1u
1u
1u
Notes:
- AVSS and DVSS of the AK5701 should be distributed separately from the ground of external controllers.
- All digital input pins should not be left floating.
- When the AK5701 is EXT mode (PMPLL bit = “0”), a resistor and capacitor of the VCOC pin is not needed.
- When the AK5701 is PLL mode (PMPLL bit = “1”), a resistor and capacitor of the VCOC pin is shown in
Table
4
. 0.1 x Cp in parallel with Cp+Rp improves PLL jitter characteristics.
- Mic input AC coupling capacitor should be 1
μ
F or less to start the recording within 100ms.
Figure 43. Typical Connection Diagram (MIC Input)
MS0404-E-02
2007/08
- 47 -
相關PDF資料
PDF描述
AK5701_07 16-Bit ツヒ Stereo ADC with PLL & MIC-AMP
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AK5702 4-Channel ADC with PLL & MIC-AMP
AK5702VN 4-Channel ADC with PLL & MIC-AMP
相關代理商/技術參數
參數描述
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