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參數(shù)資料
| 型號： | AK4682EQ |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | Multi-channel CODEC with 2Vrms Stereo Selector |
| 中文描述： | 多通道選擇與2Vrms的立體聲編解碼器 |
| 文件頁數(shù)： | 17/43頁 |
| 文件大?。?/td> | 667K |
| 代理商： | AK4682EQ |
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[AK4682]
MS0610-E-01
2007/07
- 17 -
■
De-emphasis Filter
The AK4682 includes the digital de-emphasis filter (tc=50/15
μ
s) by IIR filter. This filter corresponds to three sampling
frequencies (32kHz, 44.1kHz, 48kHz). De-emphasis filter is off in Double speed mode and Quad speed mode. De-
emphasis of each DAC can be set individually by register.
Mode
DEM11
(DEM21)
0
0
1
1
DEM10
(DEM20)
0
1
0
1
DEM
0
1
2
3
44.1kHz
OFF
48kHz
32kHz
(default)
Table 12. De-emphasis control
■
ADC Digital High Pass Filter
The ADC has a digital high pass filter for DC offset cancel. The cut-off frequency of the HPF is 1.0Hz at fs=48kHz and
scales with sampling rate (fs).
■
Audio Serial Interface Format
Each PORTA/B can select independent audio interface format. The TDMA, DIFA1-0 bits control the audio format for
PORTA and support normal mode and TDM128 mode. The DIFB1-0 bits control the audio format for PORTB and
support only normal mode. The default is mode 2. In all modes the serial data is MSB-first, 2’s complement format. The
SDTOB pins are clocked out on the falling edge of BICKB pins and the SDTIA1-0 pins are latched on the rising edge
of BICKA pins.
1. Setting for the PORTA
1-1. Normal mode: TDMA bit = “0” (default)
The TDMA bit = “0” sets the AK4682 audio serial interface format to the normal mode. The DIFA1-0 bits select
following eight serial data format (Table 13).
Mode
DIFA1
bit
bit
0
0
0
20bit, Right justified
1
0
1
24bit, Right justified
2
1
0
24bit, Left justified
3
1
1
24bit, I
2
S
Table 13 Audio Interface Format (Normal mode.)
1-2. TDM 128 mode: TDMA bit = “1”
The TDMA bits = “1” set the AK4682 audio serial interface format to the TDM 128 mode. The four channel serial
data (SDTIA1, 2) is input to the SDTIA1 pin. The data of SDTIA2 pin is not used. The TDM 128 mode is not
available in Quad Speed Mode.
Mode
DIFA1
bit
bit
8
0
0
20bit, Right justified
9
0
1
24bit, Right justified
10
1
0
24bit, Left justified
11
1
1
24bit, I
2
S
Table 14. Audio Interface Format (TDM 128 mode.)
LRCKA
L/R
H/L
H/L
H/L
L/H
BICKA
speed
≥
48fs
≥
48fs
≥
48fs
≥
48fs
DIFA0
SDTIA1-2
I/O
I
I
I
I
I/O
I
I
I
I
(default)
LRCKA
start
↑
↑
↑
↓
BICKA
speed
128fs
128fs
128fs
128fs
DIFA0
SDTIA1-2
I/O
I
I
I
I
I/O
I
I
I
I
(default)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4683_07 | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683EQ | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683 | Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4702EQ | 2ch DAC with AV SCART switch |
| AK4702 | 2CH DAC WITH AV SCART SWITCH |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4683 | 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683_07 | 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683_10 | 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683EQ | 制造商:AKM 制造商全稱:AKM 功能描述:Asynchronous Multi-Channel Audio CODEC with DIR/T |
| AK4683EQP | 制造商:AKM Semiconductor Inc 功能描述:Audio Codec 2ADC / 4DAC 24-Bit 64-Pin LQFP |
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