參數(shù)資料
型號: AK4645EZ
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: Stereo CODEC with MIC/HP-AMP
中文描述: 立體聲編解碼器麥克風(fēng)/惠普腺苷
文件頁數(shù): 86/96頁
文件大?。?/td> 933K
代理商: AK4645EZ
[AK4645EZ]
MS0605-E-00
2007/06
- 86 -
2.
PLL Slave Mode (LRCK or BICK pin)
PMPLL bit
(Addr:01H, D0)
Internal Clock
(1)
Power Supply
PDN pin
PMVCM bit
(Addr:00H, D6)
(2)
(3)
LRCK pin
BICK pin
(4)
(5)
Input
4fs of
“H”
Example:
Audio I/F Format: MSB justified (ADC & DAC)
PLL Reference clock: BICK
BICK frequency: 64fs
Sampling Frequency: 44.1kHz
(3) Addr:00H, Data:40H
(2) Addr:04H, Data:32H
Addr:05H, Data:27H
(4) Addr:01H, Data:01H
Figure 76. Clock Set Up Sequence (2)
<Example>
(1)
After Power Up, PDN pin = “L”
“H”. “L” time of 150ns or more is needed to reset the AK4645.
The AK4645 should be operated by the recommended power-up/down sequence shown in “System Design
(Grounding and Power Supply Decoupling)” to avoid the pop noise at line output and headphone output.
(2)
DIF1-0, FS3-0 and PLL3-0 bits should be set during this period.
(3)
Power Up VCOM: PMVCM bit = “0”
“1”
VCOM should first be powered up before the other block operates.
(4)
PLL starts after the PMPLL bit changes from “0” to “1” and PLL reference clock (LRCK or BICK pin) is
supplied. PLL lock time is 160ms(max) when LRCK is a PLL reference clock. And PLL lock time is 2ms(max)
when BICK is a PLL reference clock.
(5)
Normal operation stats after that the PLL is locked.
相關(guān)PDF資料
PDF描述
AK4645 Stereo CODEC with MIC/HP-AMP
AK4646EZ Stereo CODEC with MIC/SPK-AMP
AK4646 Stereo CODEC with MIC/SPK-AMP
AK4646EN Stereo CODEC with MIC/SPK-AMP
AK4647 Stereo CODEC with MIC/HP-AMP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4646 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with built-in MIC/SPK amplifier
AK4646_11 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP
AK4646EN 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP
AK4646ENP-L 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:STEREO CODEC+SPK
AK4646EZ 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP