參數(shù)資料
型號(hào)： AK4645EZ
廠商： Asahi Kasei Microsystems Co.,Ltd
元件分類： Codec
英文描述： Stereo CODEC with MIC/HP-AMP
中文描述： 立體聲編解碼器麥克風(fēng)/惠普腺苷
文件頁(yè)數(shù)： 43/96頁(yè)
文件大小： 933K
代理商： AK4645EZ
[AK4645EZ]
MS0605-E-00
2007/06
- 43 -
■
ALC Operation
The ALC (Automatic Level Control) is operated by ALC block when ALC bit is “1”. When only DAC is powered-up,
ALC circuit operates at playback path. When only ADC is powered-up or both ADC and DAC are powered-up, ALC
circuit operates at recording path.
PMADL bit, PMADR bit
PMDAC bit
LOOP bit
0
x
“00”
1
x
0
x
0
“01”, “10” or “11”
1
1
Recording Monitor Playback
Table 27. ALC Setting (x: Don’t care)
1.
ALC Limiter Operation
During the ALC limiter operation, when either Lch or Rch exceeds the ALC limiter detection level (Table 28), the IVL
and IVR values (same value) are attenuated automatically by the amount defined by the ALC limiter ATT step (Table 29).
The IVL and IVR are then set to the same value for both channels.
When ZELMN bit = “0” (zero cross detection is enabled), the IVL and IVR values are changed by ALC limiter operation
at the individual zero crossing points of Lch and Rch or at the zero crossing timeout. ZTM1-0 bits set the zero crossing
timeout period of both ALC limiter and recovery operation (Table 30).
When ZELMN bit = “1” (zero cross detection is disabled), IVL and IVR values are immediately (period: 1/fs) changed by
ALC limiter operation. Attenuation step is fixed to 1 step regardless as the setting of LMAT1-0 bits.
The attenuation operation is done continuously until the input signal level becomes ALC limiter detection level (Table 28)
or less. After completing the attenuation operation, unless ALC bit is changed to “0”, the operation repeats when the input
signal level exceeds LMTH1-0 bits.
LMTH1
LMTH0 ALC Limier Detection Level
ALC Recovery Waiting Counter Reset Level
0
0
ALC Output
≥
2.5dBFS
0
1
ALC Output
≥
4.1dBFS
1
0
ALC Output
≥
6.0dBFS
1
1
ALC Output
≥
8.5dBFS
Table 28. ALC Limiter Detection Level / Recovery Counter Reset Level
ZELMN
LMAT1
LMAT0
0
0
0
1
1
0
1
1
1
x
x
Table 29. ALC Limiter ATT Step (x: Don’t care)
Zero Crossing Timeout Period
ZTM1
ZTM0
8kHz
0
0
128/fs
16ms
0
1
256/fs
32ms
1
0
512/fs
64ms
1
1
1024/fs
128ms
Table 30. ALC Zero Crossing Timeout Period
Status
Power-down
Playback
Recording
Recording & Playback
ALC
Power-down
Playback path
Recording path
Recording path
Recording path
Default
Default
2.5dBFS > ALC Output
≥
4.1dBFS
4.1dBFS > ALC Output
≥
6.0dBFS
6.0dBFS > ALC Output
≥
8.5dBFS
8.5dBFS > ALC Output
≥
12dBFS
ALC Limiter ATT Step
1 step
2 step
4 step
8 step
1step
Default
0.375dB
0.750dB
1.500dB
3.000dB
0.375dB
0
Default
16kHz
8ms
16ms
32ms
64ms
44.1kHz
2.9ms
5.8ms
11.6ms
23.2ms
相關(guān)PDF資料
PDF描述
AK4645 Stereo CODEC with MIC/HP-AMP
AK4646EZ Stereo CODEC with MIC/SPK-AMP
AK4646 Stereo CODEC with MIC/SPK-AMP
AK4646EN Stereo CODEC with MIC/SPK-AMP
AK4647 Stereo CODEC with MIC/HP-AMP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AK4646 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with built-in MIC/SPK amplifier
AK4646_11 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP
AK4646EN 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP
AK4646ENP-L 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:STEREO CODEC+SPK
AK4646EZ 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP
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