- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385093 > AK4645EZ (Asahi Kasei Microsystems Co.,Ltd) Stereo CODEC with MIC/HP-AMP PDF資料下載
參數(shù)資料
| 型號(hào)： | AK4645EZ |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | Stereo CODEC with MIC/HP-AMP |
| 中文描述： | 立體聲編解碼器麥克風(fēng)/惠普腺苷 |
| 文件頁(yè)數(shù)： | 60/96頁(yè) |
| 文件大?。?/td> | 933K |
| 代理商： | AK4645EZ |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)當(dāng)前第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)
[AK4645EZ]
MS0605-E-00
2007/06
- 60 -
■
Full-differential Mono Line Output (LOP/LON pins)
When LODIF bit = “1”, LOUT/ROUT pins become LOP/LON pins, respectively. Lch/Rch signal of DAC or
LIN2/RIN2/LIN3/RIN3/LIN4/RIN4 is output from the LOP/LON pins which is full-differential as (L+R)/2 signal. The
load impedance is 10k
Ω
(min) for LOP and LON pins, respectively. When the PMLO bit = “0”, the mono line output
enters power-down mode and the output is Hi-Z. When the PMLO bit is “1” and LOPS bit is “1”, mono line output enters
power-save mode. Pop noise at power-up/down can be reduced by changing PMLO bit at LOPS bit = “0”. When PMLO
bit = “1” and LOPS bit = “0”, mono line output enters in normal operation. LOVL bit set the gain of mono line output.
When L4DIF=LODIF bits = “1”, full-differential output signal is as follows: (LOP)
(LON) = (IN4+)
(IN4
).
“DACL”
DAC
LOP pin
LON pin
“LOVL”
Figure 52. Mono Line Output
PMLO
0
LOPS
x
1
0
Mode
LOP
Hi-Z
Hi-Z
LON
Hi-Z
VCOM/2
Normal Operation
Default
Power-down
Power-save
Normal Operation
1
Normal Operation
Table 52. Mono Line Output Mode Setting (x: Don’t care)
LOVL
0
1
Gain
+6dB
+8dB
Output Voltage (typ)
1.2 x AVDD
1.5 x AVDD
Default
Table 53. Mono Line Output Volume Setting
PMLO bit
LOPS bit
LOP pin
LON pin
VCOM
VCOM
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Figure 53. Power-up/Power-down Timing for Mono Line Output
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4645 | Stereo CODEC with MIC/HP-AMP |
| AK4646EZ | Stereo CODEC with MIC/SPK-AMP |
| AK4646 | Stereo CODEC with MIC/SPK-AMP |
| AK4646EN | Stereo CODEC with MIC/SPK-AMP |
| AK4647 | Stereo CODEC with MIC/HP-AMP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4646 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with built-in MIC/SPK amplifier |
| AK4646_11 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP |
| AK4646EN | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP |
| AK4646ENP-L | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:STEREO CODEC+SPK |
| AK4646EZ | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo CODEC with MIC/SPK-AMP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。