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參數(shù)資料
| 型號： | AK4537VN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | 16-Bit ツヒ Stereo CODEC with MIC/HP/SPK-AMP |
| 中文描述： | 16位ツヒ立體聲編解碼器與麥克風(fēng)/惠普/胰腎聯(lián)合移植腺苷 |
| 文件頁數(shù)： | 75/76頁 |
| 文件大?。?/td> | 576K |
| 代理商： | AK4537VN |
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ASAHI KASEI
[AK4537]
MS0202-E-04
2005/04
- 75 -
Date (YY/MM/DD)
03/05/23
Revision
02
Reason
Explanation
addition:
Page
55
Contents
Register Definitions (IPGAL6-0 and IPGAR6-0
bits)
“When IPGA gain is changed, IPGAL6-0 and
IPGAR6-0 bits should be written while
PMMICL, PMMICR, PMIPGL or PMIPGR
bit is “1” and ALC1 bit is “0”. IPGA gain is
reset when PMMICL=PMMICR=PMIPGL
=PMIPGR= “0”, and then IPGA operation
starts from the default value when PMMICL,
PMMICR, PMIPGL or PMIPGR bit is
changed to “1”. When ALC1 bit is changed
from “1” to “0”, IPGA holds the last gain
value set by ALC1 operation. When
IPGAL6-0 and IPGAR6-0 bits are read, the
register values written by the last write
operation are read out regardless the actual
gain.” is added.
MIC Input Recording Sequence
Power Up MIC and ADC: “In case of stereo
mic, PMMICR and PMADR bits also should
be set to “1”.” is added.
Power Down MIC and ADC: “In case of
stereo mic, PMMICR and PMADR bits also
should be set to “0”.” is added.
“IPGA gain is reset when PMMICL
=PMMICR=PMIPGL=PMIPGR= “0”, and
then IPGA operation starts from the default
value when PMMICL, PMMICR, PMIPGL or
PMIPGR bit is changed to “1”.” is added.
Example of ALC1 Operation
Table 15: IPGAL6-0,
IPGAR6-0=47H(+27.5dB)
→
10H(0dB)
Figure 22: Addr=0BH&0FH: Data=47H
→
10H
MIC Input Recording Sequence
ALC1 Control 3 (Addr: 0BH) Set up IPGA
value for ALC1: deleted.
“After the ALC1 bit is set to “1” and MIC
block is powered-up, the ALC1 operation
starts.”
→
“After the ALC1 bit is set to “1” and
MIC block is powered-up, the ALC1
operation starts from IPGA initial value
(0dB).”
Audio Interface Format
[When LOOP bit = “1”, audio interface format
of SDTO is fixed to I
2
S regardless of DIF1-0
bits setting.] is added.
Headphone Output
Rise/fall time constant:
τ
= 250ms(max).
Time until the common goes to HVSS when
PMHPL/R bits = “1”
“0”: 500ms(max).
Headphone Output Sequence (6), (9)
Rise/fall time constant:
τ
= 250ms(max)
65
Explanation
change:
28
65
04/11/26
03
Explanation
addition:
24
32
66
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK4538 | 16Bit DS CODEC with MIC/HP/SPK-AMP |
| AK4538VN | 16Bit DS CODEC with MIC/HP/SPK-AMP |
| AK4541VQ | AC’97 Rev 2.1 Multimedia Audio CODEC |
| AK4541 | AC’97 Rev 2.1 Multimedia Audio CODEC |
| AK4543 | AC’97 Rev 2.1 Multimedia Audio CODEC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4537VNP-L | 制造商:AKM Semiconductor Inc 功能描述:AK4537VNP-L |
| AK4538 | 制造商:AKM 制造商全稱:AKM 功能描述:16Bit DS CODEC with MIC/HP/SPK-AMP |
| AK4538VN | 制造商:AKM 制造商全稱:AKM 功能描述:16Bit DS CODEC with MIC/HP/SPK-AMP |
| AK4541 | 制造商:AKM 制造商全稱:AKM 功能描述:AC’97 Rev 2.1 Multimedia Audio CODEC |
| AK4541VQ | 制造商:AKM 制造商全稱:AKM 功能描述:AC’97 Rev 2.1 Multimedia Audio CODEC |
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