參數(shù)資料
型號: AK4537VN
廠商: Asahi Kasei Microsystems Co.,Ltd
元件分類: Codec
英文描述: 16-Bit ツヒ Stereo CODEC with MIC/HP/SPK-AMP
中文描述: 16位ツヒ立體聲編解碼器與麥克風/惠普/胰腎聯(lián)合移植腺苷
文件頁數(shù): 55/76頁
文件大?。?/td> 576K
代理商: AK4537VN
ASAHI KASEI
[AK4537]
MS0202-E-04
2005/04
- 55 -
ALC1: ALC1 Enable Flag
0: ALC1 Disable (Default)
1: ALC1 Enable
ALC1 is enabled when ALC1 bit is “1”. Default is “0”(Disable).
ALC2: ALC2 Enable Flag
0: ALC2 Disable
1: ALC2 Enable (Default)
ALC2 is enabled after initialization cycle(2048/fs=46.4ms@fs=44.1kHz). This initialization cycle starts when
PMSPK bit is changed from “0” to “1”. Default is “1”(Enable).
Addr
Register Name
D7
D6
0AH
ALC Mode Control 2
0
REF6
REF5
R/W
RD
R/W
Default
0
0
REF6-0: Reference value at ALC1 Recovery Operation (see Table 31)
During the ALC1 recovery operation, if the IPGA value exceeds the setting reference value by gain operation,
then the IPGA does not become larger than the reference value. For example, when REF7-0 = “30H”, RATT
= 2step, IPGA = 2FH, even if the input signal does not exceed the “ALC1 Recovery Waiting Counter Reset
Level”, the IPGA does not change to 2FH + 2step = 31H, and keeps 30H. Default is “36H”.
GAIN (dB)
DATA (HEX)
MIC Input
LINE Input
47
+27.5
46
+27.0
45
+26.5
:
:
36
+19.0
:
:
2F
+15.5
:
:
10
+0.0
:
:
06
5.0
05
5.5
04
6.0
03
6.5
02
7.0
01
7.5
00
8.0
Table 31. Setting Reference Value at ALC1 Recovery Operation
D5
D4
REF4
R/W
1
D3
REF3
R/W
0
D2
REF2
R/W
1
D1
REF1
R/W
1
D0
REF0
R/W
0
R/W
1
Default
STEP
+12.0
+11.5
+11.0
:
+3.5
:
+0.0
:
-15.5
:
20.5
21.0
21.5
22.0
22.5
23.0
23.5
0.5dB
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