
ASAHI KASEI
[AK4342]
MS0506-E-02
2006/07
- 36 -
Addr Register Name
03H
Mode Control 2
D7
PGAC
R/W
0
D6
PTS1
R/W
0
D5
PTS0
R/W
0
D4
STS1
R/W
0
D3
STS0
R/W
1
D2
D1
BCKP
R/W
0
D0
LRP
R/W
0
DATTC
R/W
0
R/W
Default
LRP: LRCK Polarity Select
0: Normal (Default)
1: Invert
BCKP: BICK Polarity Select
0: Normal (Default)
1: Invert
DATTC: DAC Digital Attenuator Control Mode Select
0: Independent (Default)
1: Dependent
At DATTC bit = “1”, ATTL7-0 bits control both Lch and Rch attenuation level, while register values of
ATTL7-0 bits are not written to ATTR7-0 bits. At DATTC bit = “0”, ATTL7-0 bits control Lch level and
ATTR7-0 bits control Rch level.
STS1-0: Soft mute cycle setting (See Table 7)
Default: “01” (1020LRCK at Normal Speed Mode)
PTS1-0: Select Transition time for AMUTE, LINL, LINR, RINL, RINR, DACLR, LPGA4-0, PGAL4-0,
PGAR4-0, LMUTE, HMUTEL and HMUTER (See Table 15)
Default: “00”
PGAC: PGA Control Mode Select
0: Independent (Default)
1: Dependent
At PGAC bit = “1”, PGL4-0 bits control both Lch and Rch attenuation level, while register values of
PGAL4-0 bits are not written to PGAR4-0 bits. At PGAC bit = “0”, PGAL4-0 bits control Lch level and
PGAR4-0 bits control Rch level.
Addr Register Name
04H
Lch PGA Control
05H
Rch PGA Control
D7
0
0
RD
0
D6
0
0
RD
0
D5
D4
D3
D2
D1
D0
HMUTEL
HMUTER
R/W
1
PGAL4
PGAR4
R/W
1
PGAL3
PGAR3
R/W
1
PGAL2 PGAL1 PGAL0
PGAR2 PGAR1 PGAR0
R/W
R/W
0
0
R/W
Default
R/W
1
PGAL4-0: Setting of analog volume for Lch (See Table 10)
HMUTEL: Mute control for HPL
0: Normal operation
PGAL4-0 bits control attenuation value.
1: Mute. (Default)
PGAL4-0 bits are ignored.
PGAR4-0: Setting of analog volume for Rch (See Table 10)
HMUTER: Mute control for HPR
0: Normal operation
PGAR4-0 bits control attenuation value.
1: Mute. (Default)
PGAR4-0 bits are ignored.