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參數(shù)資料
| 型號： | AK4342EN |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 24-Bit Stereo DAC with HP-AMP & 2V Line-Out |
| 中文描述： | 24位立體聲DAC惠普腺苷 |
| 文件頁數(shù)： | 28/43頁 |
| 文件大?。?/td> | 580K |
| 代理商： | AK4342EN |
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ASAHI KASEI
[AK4342]
MS0506-E-02
2006/07
- 28 -
(4) Power Up the charge pump circuit, DAC and VCOM; PMCP bit = PMDAC bit = PMVCM bit = “0”
“1”
PVEE pin goes to PVEE voltage according to the setting of FS3-0 bits (See Table 9).
(5) When PMCP bit and PMHP bit (PMLO bit) are set to “1” at the same time or PMHP bit (PMLO bit) is set to “1”
during the charge pump circuit is powered-up, headphone (lineout) amplifier is powered-up after the charge pump
circuit is powered-up.
(6) Power Up the headphone (lineout) amplifiers; PMHP bit (PMLO bit) = “0”
“1”
The headphone (lineout) amplifiers are in mute state and have some DC offset. The power up time of headphone
(lineout) amplifiers depends on PUT1-0 bits and FS3-0 bits.
PMHP and PMLO bits should not be changed during this period.
(7) Release the mute state of headphone (lineout) amplifiers; HMUTEL bit = HMUTER bit (LMUTE bit) = “1”
“0”
The headphone (lineout) amplifiers are in the normal state after the transition time passes. The transition is
executed via soft changes. The transition time depends on PTS1-0 bits and FS3-0 bits.
LPGA4-0, PGAL4-0, PGAR4-0 and PGAC bits should not be changed during this period.
(8) Mute headphone (lineout) amplifiers: HMUTEL = HMUTER (LMUTE bit) = “0”
“1”
The headphone (lineout) amplifiers are in the mute state after the transition time passes. The transition is executed
via soft changes. The transition time depends on PTS1-0 bits and FS3-0 bits.
LPGA4-0, PGAL4-0, PGAR4-0 and PGAC bits should not be changed during this period.
(9) Power-down the headphone (lineout) amp; PMHP bit (PMLO bit) = “1”
“0”
The headphone (lineout) amplifiers are powered-down. The power-down time of headphone (lineout) amplifiers
depend on PUT1-0 bits and FS3-0 bits.
PMHP and PMLO bits should not be changed during this period.
(10) Power down the charge pump circuit, DAC and VCOM; PMCP bit = PMDAC bit = PMVCM bit = “1”
“0”
PVEE pin becomes “0V” according to the time constant of internal resistor and capacitor of PVEE and HVEE
pins. Internal resistor is typically 17.5k
. The charge pump circuit may be powered-up during this period.
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PDF描述 |
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| AK4343EN | Stereo DAC with HP/RCV/SPK-AMP |
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| AK4345ET | 100dB 96kHz 24-Bit Stereo 3.3V ツヒ DAC with DIT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4342EN-L | 制造商:ASAHI 功能描述: |
| AK4342ENP-L | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
| AK4343 | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo DAC with built-in HP/RCV/SPK amplifier |
| AK434-3 | 功能描述:CABLE CENTRONICS F-F 3M RoHS:否 類別:電纜組件 >> D形，Centronics 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 配置:VHDCI 68 位置公型至公型 長度:10.00'（3.05m） 纜線類型:圓形 - 黑色 屏蔽:屏蔽 樣式:SCSI Ultra 2 |
| AK4343EN | 制造商:AKM 制造商全稱:AKM 功能描述:Stereo DAC with HP/RCV/SPK-AMP |
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