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參數(shù)資料
| 型號： | ADV7320 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| 中文描述： | 多格式視頻編碼器216兆赫六噪聲整形的12位DAC |
| 文件頁數(shù)： | 63/88頁 |
| 文件大?。?/td> | 1002K |
| 代理商： | ADV7320 |
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ADV7320/ADV7321
Rev. 0 | Page 63 of 88
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Figure 89. Filter Plot for Output Filter for PS, 8× Oversampling
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Figure 90. Filter Plot for Output Filter for HDTV, 2× Oversampling
PCB BOARD LAYOUT
The ADV7320/ADV7321 are optimally designed for lowest
noise performance of both radiated and conducted noise. To
complement the excellent noise performance of the ADV7320/
ADV7321, it is imperative that great care be given to the PC
board layout.
The layout should be optimized for lowest noise on the
ADV7320/ ADV7321 power and ground lines. This can be
achieved by shielding the digital inputs and providing good
decoupling. The lead length between groups of V
AA
and AGND,
V
DD
and DGND, and V
DD_IO
and GND_IO pins should be kept
as short as possible to minimized inductive ringing.
It is recommended that a 4-layer printed circuit board is used,
with power and ground planes separating the layer of the signal
carrying traces of the components and solder side layer. Com-
ponent placement should be carefully considered in order to
separate noisy circuits, such as crystal clocks, high speed logic
circuitry, and analog circuitry.
There should be a separate analog ground plane and a separate
digital ground plane.
Power planes should encompass a digital power plane and an
analog power plane. The analog power plane should contain the
DACs and all associated circuitry, V
REF
circuitry. The digital
power plane should contain all logic circuitry.
The analog and digital power planes should be individually
connected to the common power plane at a single point
through a suitable filtering device, such as a ferrite bead.
DAC output traces on a PCB should be treated as transmission
lines. It is recommended that the DACs be placed as close as
possible to the output connector, with the analog output traces
being as short as possible (less than 3 inches). The DAC termi-
nation resistors should be placed as close as possible to the DAC
outputs and should overlay the PCB’s ground plane. As well as
minimizing reflections, short analog output traces will reduce
noise pickup due to neighboring digital circuitry.
To avoid crosstalk between the DAC outputs, it is recom-
mended that as much space as possible be left between the
tracks of the individual DAC output pins. The addition of
ground tracks between outputs is also recommended.
Supply Decoupling
Noise on the analog power plane can be further reduced by the
use of decoupling capacitors.
Optimum performance is achieved by the use of 10 nF and
0.1 μF ceramic capacitors. Each group of V
AA
, V
DD
, or V
DD_IO
pins should be individually decoupled to ground. This should
be done by placing the capacitors as close as possible to the
device with the capacitor leads as short as possible, thus
minimizing lead inductance.
A 1 μF tantalum capacitor is recommended across the V
AA
supply in addition to 10 nF ceramic. See the circuit layout in
Figure 91.
Digital Signal Interconnect
The digital signal lines should be isolated as much as possible
from the analog outputs and other analog circuitry. Digital
signal lines should not overlay the analog power plane.
Due to the high clock rates used, avoid long clock lines to the
ADV7320/ADV7321 to minimize noise pickup.
Any active pull-up termination resistors for the digital inputs
should be connected to the digital power plane and not the
analog power plane.
Analog Signal Interconnect
Locate the ADV7320/ADV7321 as close as possible to the
output connectors to minimize noise pickup and reflections due
to impedance mismatch.
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