參數(shù)資料
型號(hào): ADV7303AKST
廠商: ANALOG DEVICES INC
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: Sand Paper; Abrasive Grade:T; Color:White; Pack Quantity:3; Roll Length:30ft; Width:4"
中文描述: COLOR SIGNAL ENCODER, PQFP64
封裝: PLASTIC, MS-026BCD, LQFP-64
文件頁(yè)數(shù): 30/68頁(yè)
文件大?。?/td> 1177K
代理商: ADV7303AKST
REV. A
–30–
ADV7302A/ADV7303A
PROGRESSIVE SCAN AT 27 MHz OR 54 MHz
YCrCb progressive scan data can be input at 27 MHz or 54 MHz.
The input data is interleaved onto a single 8-bit bus and is input
on Pins Y7–Y0. For PS Input Only Mode, the input clock
must be input on CLKIN_A. In Simultaneous SD/HD Mode,
the input clock is input on CLKIN_B.
MPEG2
DECODER
P_VSYNC
P_HSYNC
P_BLANK
CLKIN_A
Y7–Y0
INTERLACED
TO
PROGRESSIVE
YCrCb
8
3
ADV7302A/
ADV7303A
27MHz OR
54MHz
YCrCb
Figure 25. 1 8-Bit PS @ 27 MHz or 54 MHz
When the input sequence of the PS data, i.e., 8-bit interleaved
at 27 MHz, starts with Y0 data as shown in Figure 26, PIXEL
ALIGN [Subaddress 01h] must be set to “0.” In this case, the
timing information embedded in the data stream is recognized
and the video data is transferred to the according Y channel
and CrCb channel processing blocks.
PIXEL INPUT
DATA
3FF
00
00
XY
Y0
Cb0
Y1
Cr0
CLKIN_A
Figure 26. Input Sequence in PS 8-Bit Interleaved
Mode, EAV/SAV Followed by Y0 Data
If the input sequence starts with Cb0 data as shown in Figure 27,
initially PIXEL ALIGN [Subaddress 01h] must be set to “0.”
This ensures that the ADV7302A/ADV7303A locks to the
input sequence in decoding the embedded timing information
correctly. For correct color decoding, the Pixel Align Bit
[Subaddress 01h] must then be set to “l(fā)” after a delay of one
field. The ADV7302A/ADV7303A is now in free run mode,
any changes in the timing information are ignored.
PIXEL INPUT
DATA
3FF
00
00
XY
Cb0
Y0
Cr0
Y1
CLKIN_A
Figure 27. Input Sequence in PS 8-Bit Interleaved
Mode, EAV/SAV Followed by Cb0 Data
PS 8-bit interleaved at 54 MHz must be input with separate
timing signals. EAV/SAV codes cannot be used in this mode.
相關(guān)PDF資料
PDF描述
ADV7310 Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7310KST Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311 Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7311KST Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
ADV7312 Multiformat 11-Bit HDTV Video Encoder
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV73045701 制造商:LG Corporation 功能描述:Frame Assembly
ADV73045702 制造商:LG Corporation 功能描述:Frame Assembly
ADV73045703 制造商:LG Corporation 功能描述:Frame Assembly
ADV73045704 制造商:LG Corporation 功能描述:Frame Assembly
ADV73045753 制造商:LG Corporation 功能描述:Frame Assembly